a3c6018e56
Debugging and original patch from Nick Piggin <npiggin@suse.de> The early fixmap pmd entry inserted at the very top of the KVA is causing the subsequent fixmap mapping code to not provide physically linear pte pages over the kmap atomic portion of the fixmap (which relies on said property to calculate pte addresses). This has caused weird boot failures in kmap_atomic much later in the boot process (initial userspace faults) on a 32-bit PAE system with a larger number of CPUs (smaller CPU counts tend not to run over into the next page so don't show up the problem). Solve this by attempting to clear out the page table, and copy any of its entries to the new one. Also, add a bug if a nonlinear condition is encountered and can't be resolved, which might save some hours of debugging if this fragile scheme ever breaks again... Once we have such logic, we can also use it to eliminate the early ioremap trickery around the page table setup for the fixmap area. This also fixes potential issues with FIX_* entries sharing the leaf page table with the early ioremap ones getting discarded by early_ioremap_clear() and not restored by early_ioremap_reset(). It at once eliminates the temporary (and configuration, namely NR_CPUS, dependent) unavailability of early fixed mappings during the time the fixmap area page tables get constructed. Finally, also replace the hard coded calculation of the initial table space needed for the fixmap area with a proper one, allowing kernels configured for large CPU counts to actually boot. Based-on: Nick Piggin <npiggin@suse.de> Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
109 lines
3.2 KiB
C
109 lines
3.2 KiB
C
#ifndef _ASM_X86_IO_H
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#define _ASM_X86_IO_H
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#define ARCH_HAS_IOREMAP_WC
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#include <linux/compiler.h>
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#include <asm-generic/int-ll64.h>
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#define build_mmio_read(name, size, type, reg, barrier) \
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static inline type name(const volatile void __iomem *addr) \
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{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \
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:"m" (*(volatile type __force *)addr) barrier); return ret; }
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#define build_mmio_write(name, size, type, reg, barrier) \
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static inline void name(type val, volatile void __iomem *addr) \
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{ asm volatile("mov" size " %0,%1": :reg (val), \
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"m" (*(volatile type __force *)addr) barrier); }
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build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
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build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
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build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
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build_mmio_read(__readb, "b", unsigned char, "=q", )
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build_mmio_read(__readw, "w", unsigned short, "=r", )
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build_mmio_read(__readl, "l", unsigned int, "=r", )
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build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
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build_mmio_write(writew, "w", unsigned short, "r", :"memory")
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build_mmio_write(writel, "l", unsigned int, "r", :"memory")
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build_mmio_write(__writeb, "b", unsigned char, "q", )
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build_mmio_write(__writew, "w", unsigned short, "r", )
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build_mmio_write(__writel, "l", unsigned int, "r", )
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#define readb_relaxed(a) __readb(a)
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#define readw_relaxed(a) __readw(a)
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#define readl_relaxed(a) __readl(a)
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#define __raw_readb __readb
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#define __raw_readw __readw
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#define __raw_readl __readl
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#define __raw_writeb __writeb
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#define __raw_writew __writew
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#define __raw_writel __writel
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#define mmiowb() barrier()
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#ifdef CONFIG_X86_64
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build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
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build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
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#else
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static inline __u64 readq(const volatile void __iomem *addr)
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{
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const volatile u32 __iomem *p = addr;
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u32 low, high;
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low = readl(p);
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high = readl(p + 1);
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return low + ((u64)high << 32);
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}
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static inline void writeq(__u64 val, volatile void __iomem *addr)
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{
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writel(val, addr);
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writel(val >> 32, addr+4);
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}
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#endif
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#define readq_relaxed(a) readq(a)
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#define __raw_readq(a) readq(a)
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#define __raw_writeq(val, addr) writeq(val, addr)
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/* Let people know that we have them */
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#define readq readq
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#define writeq writeq
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#ifdef CONFIG_X86_32
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# include "io_32.h"
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#else
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# include "io_64.h"
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#endif
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extern void *xlate_dev_mem_ptr(unsigned long phys);
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extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
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extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
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unsigned long prot_val);
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extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size);
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/*
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* early_ioremap() and early_iounmap() are for temporary early boot-time
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* mappings, before the real ioremap() is functional.
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* A boot-time mapping is currently limited to at most 16 pages.
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*/
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extern void early_ioremap_init(void);
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extern void early_ioremap_reset(void);
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extern void __iomem *early_ioremap(unsigned long offset, unsigned long size);
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extern void __iomem *early_memremap(unsigned long offset, unsigned long size);
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extern void early_iounmap(void __iomem *addr, unsigned long size);
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extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
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#endif /* _ASM_X86_IO_H */
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