e75eac33b5
Clean up and refactor i386 sub-architecture setup. This change moves all the code from the asm-i386/mach-*/setup_arch_pre/post.h headers, into arch/i386/mach-*/setup.c. mach-*/setup_arch_pre.h is renamed to setup_arch.h, and contains only things which should be in header files. It is purely code-motion; there should be no functional changes at all. Several functions in arch/i386/kernel/setup.c needed to be made non-static so that they're visible to the code in mach-*/setup.c. asm-i386/setup.h is used to hold the prototypes for these functions. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Cc: Zachary Amsden <zach@vmware.com> Cc: Chris Wright <chrisw@sous-sol.org> Cc: Christian Limpach <Christian.Limpach@cl.cam.ac.uk> Cc: Martin Bligh <mbligh@google.com> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Andrey Panin <pazke@donpac.ru> Cc: Dave Hansen <haveblue@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
121 lines
2.7 KiB
C
121 lines
2.7 KiB
C
/*
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* Machine specific setup for generic
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*/
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <asm/acpi.h>
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#include <asm/arch_hooks.h>
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#include <asm/voyager.h>
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#include <asm/e820.h>
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#include <asm/setup.h>
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void __init pre_intr_init_hook(void)
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{
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init_ISA_irqs();
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}
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/*
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* IRQ2 is cascade interrupt to second interrupt controller
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*/
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static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL};
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void __init intr_init_hook(void)
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{
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#ifdef CONFIG_SMP
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smp_intr_init();
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#endif
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if (!acpi_ioapic)
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setup_irq(2, &irq2);
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}
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void __init pre_setup_arch_hook(void)
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{
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/* Voyagers run their CPUs from independent clocks, so disable
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* the TSC code because we can't sync them */
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tsc_disable = 1;
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}
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void __init trap_init_hook(void)
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{
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}
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static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL};
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void __init time_init_hook(void)
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{
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setup_irq(0, &irq0);
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}
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/* Hook for machine specific memory setup. */
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char * __init machine_specific_memory_setup(void)
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{
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char *who;
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who = "NOT VOYAGER";
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if(voyager_level == 5) {
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__u32 addr, length;
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int i;
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who = "Voyager-SUS";
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e820.nr_map = 0;
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for(i=0; voyager_memory_detect(i, &addr, &length); i++) {
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add_memory_region(addr, length, E820_RAM);
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}
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return who;
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} else if(voyager_level == 4) {
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__u32 tom;
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__u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT)<<8;
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/* select the DINO config space */
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outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT);
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/* Read DINO top of memory register */
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tom = ((inb(catbase + 0x4) & 0xf0) << 16)
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+ ((inb(catbase + 0x5) & 0x7f) << 24);
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if(inb(catbase) != VOYAGER_DINO) {
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printk(KERN_ERR "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n");
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tom = (EXT_MEM_K)<<10;
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}
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who = "Voyager-TOM";
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add_memory_region(0, 0x9f000, E820_RAM);
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/* map from 1M to top of memory */
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add_memory_region(1*1024*1024, tom - 1*1024*1024, E820_RAM);
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/* FIXME: Should check the ASICs to see if I need to
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* take out the 8M window. Just do it at the moment
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* */
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add_memory_region(8*1024*1024, 8*1024*1024, E820_RESERVED);
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return who;
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}
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who = "BIOS-e820";
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/*
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* Try to copy the BIOS-supplied E820-map.
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*
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* Otherwise fake a memory map; one section from 0k->640k,
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* the next section from 1mb->appropriate_mem_k
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*/
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sanitize_e820_map(E820_MAP, &E820_MAP_NR);
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if (copy_e820_map(E820_MAP, E820_MAP_NR) < 0) {
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unsigned long mem_size;
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/* compare results from other methods and take the greater */
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if (ALT_MEM_K < EXT_MEM_K) {
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mem_size = EXT_MEM_K;
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who = "BIOS-88";
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} else {
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mem_size = ALT_MEM_K;
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who = "BIOS-e801";
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}
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e820.nr_map = 0;
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add_memory_region(0, LOWMEMSIZE(), E820_RAM);
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add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM);
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}
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return who;
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}
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