6bb27d7349
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
259 lines
6 KiB
C
259 lines
6 KiB
C
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/cpuidle.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/phy.h>
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#include <linux/regmap.h>
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#include <linux/micrel_phy.h>
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#include <linux/mfd/syscon.h>
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#include <asm/cpuidle.h>
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#include <asm/smp_twd.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/hardware/gic.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/system_misc.h>
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#include "common.h"
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#include "cpuidle.h"
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#include "hardware.h"
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#define IMX6Q_ANALOG_DIGPROG 0x260
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static int imx6q_revision(void)
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{
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struct device_node *np;
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void __iomem *base;
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static u32 rev;
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if (!rev) {
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np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
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if (!np)
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return IMX_CHIP_REVISION_UNKNOWN;
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base = of_iomap(np, 0);
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if (!base) {
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of_node_put(np);
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return IMX_CHIP_REVISION_UNKNOWN;
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}
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rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
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iounmap(base);
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of_node_put(np);
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}
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switch (rev & 0xff) {
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case 0:
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return IMX_CHIP_REVISION_1_0;
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case 1:
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return IMX_CHIP_REVISION_1_1;
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case 2:
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return IMX_CHIP_REVISION_1_2;
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default:
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return IMX_CHIP_REVISION_UNKNOWN;
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}
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}
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void imx6q_restart(char mode, const char *cmd)
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{
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struct device_node *np;
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void __iomem *wdog_base;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
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wdog_base = of_iomap(np, 0);
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if (!wdog_base)
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goto soft;
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imx_src_prepare_restart();
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/* enable wdog */
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writew_relaxed(1 << 2, wdog_base);
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/* write twice to ensure the request will not get ignored */
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writew_relaxed(1 << 2, wdog_base);
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/* wait for reset to assert ... */
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mdelay(500);
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pr_err("Watchdog reset failed to assert reset\n");
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/* delay to allow the serial port to show the message */
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mdelay(50);
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soft:
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/* we'll take a jump through zero as a poor second */
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soft_restart(0);
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}
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/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
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static int ksz9021rn_phy_fixup(struct phy_device *phydev)
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{
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if (IS_BUILTIN(CONFIG_PHYLIB)) {
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/* min rx data delay */
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phy_write(phydev, 0x0b, 0x8105);
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phy_write(phydev, 0x0c, 0x0000);
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/* max rx/tx clock delay, min rx/tx control delay */
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phy_write(phydev, 0x0b, 0x8104);
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phy_write(phydev, 0x0c, 0xf0f0);
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phy_write(phydev, 0x0b, 0x104);
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}
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return 0;
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}
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static void __init imx6q_sabrelite_cko1_setup(void)
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{
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struct clk *cko1_sel, *ahb, *cko1;
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unsigned long rate;
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cko1_sel = clk_get_sys(NULL, "cko1_sel");
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ahb = clk_get_sys(NULL, "ahb");
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cko1 = clk_get_sys(NULL, "cko1");
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if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
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pr_err("cko1 setup failed!\n");
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goto put_clk;
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}
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clk_set_parent(cko1_sel, ahb);
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rate = clk_round_rate(cko1, 16000000);
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clk_set_rate(cko1, rate);
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put_clk:
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if (!IS_ERR(cko1_sel))
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clk_put(cko1_sel);
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if (!IS_ERR(ahb))
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clk_put(ahb);
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if (!IS_ERR(cko1))
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clk_put(cko1);
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}
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static void __init imx6q_sabrelite_init(void)
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{
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if (IS_BUILTIN(CONFIG_PHYLIB))
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phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
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ksz9021rn_phy_fixup);
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imx6q_sabrelite_cko1_setup();
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}
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static void __init imx6q_1588_init(void)
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{
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struct regmap *gpr;
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
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if (!IS_ERR(gpr))
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regmap_update_bits(gpr, 0x4, 1 << 21, 1 << 21);
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else
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pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n");
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}
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static void __init imx6q_usb_init(void)
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{
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struct regmap *anatop;
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#define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
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#define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
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#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
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#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
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anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
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if (!IS_ERR(anatop)) {
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/*
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* The external charger detector needs to be disabled,
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* or the signal at DP will be poor
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*/
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regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
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BM_ANADIG_USB_CHRG_DETECT_EN_B
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| BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
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regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
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BM_ANADIG_USB_CHRG_DETECT_EN_B |
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BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
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} else {
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pr_warn("failed to find fsl,imx6q-anatop regmap\n");
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}
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}
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static void __init imx6q_init_machine(void)
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{
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if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
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imx6q_sabrelite_init();
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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imx6q_pm_init();
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imx6q_usb_init();
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imx6q_1588_init();
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}
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static struct cpuidle_driver imx6q_cpuidle_driver = {
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.name = "imx6q_cpuidle",
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.owner = THIS_MODULE,
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.en_core_tk_irqen = 1,
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.states[0] = ARM_CPUIDLE_WFI_STATE,
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.state_count = 1,
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};
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static void __init imx6q_init_late(void)
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{
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imx_cpuidle_init(&imx6q_cpuidle_driver);
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}
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static void __init imx6q_map_io(void)
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{
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imx_lluart_map_io();
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imx_scu_map_io();
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imx6q_clock_map_io();
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}
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static const struct of_device_id imx6q_irq_match[] __initconst = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
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{ /* sentinel */ }
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};
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static void __init imx6q_init_irq(void)
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{
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l2x0_of_init(0, ~0UL);
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imx_src_init();
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imx_gpc_init();
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of_irq_init(imx6q_irq_match);
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}
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static void __init imx6q_timer_init(void)
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{
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mx6q_clocks_init();
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twd_local_timer_of_register();
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imx_print_silicon_rev("i.MX6Q", imx6q_revision());
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}
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static const char *imx6q_dt_compat[] __initdata = {
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"fsl,imx6q",
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NULL,
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};
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DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
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.smp = smp_ops(imx_smp_ops),
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.map_io = imx6q_map_io,
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.init_irq = imx6q_init_irq,
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.handle_irq = imx6q_handle_irq,
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.init_time = imx6q_timer_init,
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.init_machine = imx6q_init_machine,
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.init_late = imx6q_init_late,
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.dt_compat = imx6q_dt_compat,
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.restart = imx6q_restart,
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MACHINE_END
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