8213a2f3ee
Pull pile 2 of execve and kernel_thread unification work from Al Viro: "Stuff in there: kernel_thread/kernel_execve/sys_execve conversions for several more architectures plus assorted signal fixes and cleanups. There'll be more (in particular, real fixes for the alpha do_notify_resume() irq mess)..." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: (43 commits) alpha: don't open-code trace_report_syscall_{enter,exit} Uninclude linux/freezer.h m32r: trim masks avr32: trim masks tile: don't bother with SIGTRAP in setup_frame microblaze: don't bother with SIGTRAP in setup_rt_frame() mn10300: don't bother with SIGTRAP in setup_frame() frv: no need to raise SIGTRAP in setup_frame() x86: get rid of duplicate code in case of CONFIG_VM86 unicore32: remove pointless test h8300: trim _TIF_WORK_MASK parisc: decide whether to go to slow path (tracesys) based on thread flags parisc: don't bother looping in do_signal() parisc: fix double restarts bury the rest of TIF_IRET sanitize tsk_is_polling() bury _TIF_RESTORE_SIGMASK unicore32: unobfuscate _TIF_WORK_MASK mips: NOTIFY_RESUME is not needed in TIF masks mips: merge the identical "return from syscall" per-ABI code ... Conflicts: arch/arm/include/asm/thread_info.h
1297 lines
32 KiB
C
1297 lines
32 KiB
C
/*
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* Derived from "arch/i386/kernel/process.c"
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* Copyright (C) 1995 Linus Torvalds
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*
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* Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
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* Paul Mackerras (paulus@cs.anu.edu.au)
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*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/elf.h>
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#include <linux/init.h>
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#include <linux/prctl.h>
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#include <linux/init_task.h>
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#include <linux/export.h>
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#include <linux/kallsyms.h>
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#include <linux/mqueue.h>
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#include <linux/hardirq.h>
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#include <linux/utsname.h>
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#include <linux/ftrace.h>
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#include <linux/kernel_stat.h>
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#include <linux/personality.h>
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#include <linux/random.h>
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#include <linux/hw_breakpoint.h>
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#include <asm/pgtable.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/prom.h>
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#include <asm/machdep.h>
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#include <asm/time.h>
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#include <asm/runlatch.h>
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#include <asm/syscalls.h>
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#include <asm/switch_to.h>
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#include <asm/debug.h>
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#ifdef CONFIG_PPC64
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#include <asm/firmware.h>
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#endif
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#include <linux/kprobes.h>
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#include <linux/kdebug.h>
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extern unsigned long _get_SP(void);
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#ifndef CONFIG_SMP
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struct task_struct *last_task_used_math = NULL;
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struct task_struct *last_task_used_altivec = NULL;
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struct task_struct *last_task_used_vsx = NULL;
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struct task_struct *last_task_used_spe = NULL;
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#endif
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/*
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* Make sure the floating-point register state in the
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* the thread_struct is up to date for task tsk.
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*/
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void flush_fp_to_thread(struct task_struct *tsk)
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{
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if (tsk->thread.regs) {
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/*
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* We need to disable preemption here because if we didn't,
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* another process could get scheduled after the regs->msr
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* test but before we have finished saving the FP registers
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* to the thread_struct. That process could take over the
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* FPU, and then when we get scheduled again we would store
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* bogus values for the remaining FP registers.
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*/
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preempt_disable();
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if (tsk->thread.regs->msr & MSR_FP) {
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#ifdef CONFIG_SMP
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/*
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* This should only ever be called for current or
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* for a stopped child process. Since we save away
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* the FP register state on context switch on SMP,
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* there is something wrong if a stopped child appears
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* to still have its FP state in the CPU registers.
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*/
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BUG_ON(tsk != current);
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#endif
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giveup_fpu(tsk);
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}
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preempt_enable();
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}
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}
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EXPORT_SYMBOL_GPL(flush_fp_to_thread);
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void enable_kernel_fp(void)
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{
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WARN_ON(preemptible());
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#ifdef CONFIG_SMP
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if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
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giveup_fpu(current);
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else
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giveup_fpu(NULL); /* just enables FP for kernel */
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#else
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giveup_fpu(last_task_used_math);
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#endif /* CONFIG_SMP */
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}
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EXPORT_SYMBOL(enable_kernel_fp);
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#ifdef CONFIG_ALTIVEC
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void enable_kernel_altivec(void)
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{
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WARN_ON(preemptible());
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#ifdef CONFIG_SMP
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if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
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giveup_altivec(current);
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else
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giveup_altivec_notask();
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#else
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giveup_altivec(last_task_used_altivec);
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#endif /* CONFIG_SMP */
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}
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EXPORT_SYMBOL(enable_kernel_altivec);
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/*
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* Make sure the VMX/Altivec register state in the
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* the thread_struct is up to date for task tsk.
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*/
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void flush_altivec_to_thread(struct task_struct *tsk)
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{
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if (tsk->thread.regs) {
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preempt_disable();
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if (tsk->thread.regs->msr & MSR_VEC) {
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#ifdef CONFIG_SMP
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BUG_ON(tsk != current);
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#endif
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giveup_altivec(tsk);
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}
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preempt_enable();
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}
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}
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EXPORT_SYMBOL_GPL(flush_altivec_to_thread);
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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#if 0
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/* not currently used, but some crazy RAID module might want to later */
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void enable_kernel_vsx(void)
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{
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WARN_ON(preemptible());
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#ifdef CONFIG_SMP
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if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
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giveup_vsx(current);
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else
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giveup_vsx(NULL); /* just enable vsx for kernel - force */
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#else
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giveup_vsx(last_task_used_vsx);
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#endif /* CONFIG_SMP */
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}
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EXPORT_SYMBOL(enable_kernel_vsx);
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#endif
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void giveup_vsx(struct task_struct *tsk)
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{
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giveup_fpu(tsk);
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giveup_altivec(tsk);
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__giveup_vsx(tsk);
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}
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void flush_vsx_to_thread(struct task_struct *tsk)
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{
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if (tsk->thread.regs) {
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preempt_disable();
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if (tsk->thread.regs->msr & MSR_VSX) {
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#ifdef CONFIG_SMP
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BUG_ON(tsk != current);
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#endif
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giveup_vsx(tsk);
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}
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preempt_enable();
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}
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}
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EXPORT_SYMBOL_GPL(flush_vsx_to_thread);
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_SPE
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void enable_kernel_spe(void)
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{
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WARN_ON(preemptible());
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#ifdef CONFIG_SMP
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if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
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giveup_spe(current);
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else
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giveup_spe(NULL); /* just enable SPE for kernel - force */
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#else
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giveup_spe(last_task_used_spe);
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#endif /* __SMP __ */
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}
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EXPORT_SYMBOL(enable_kernel_spe);
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void flush_spe_to_thread(struct task_struct *tsk)
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{
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if (tsk->thread.regs) {
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preempt_disable();
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if (tsk->thread.regs->msr & MSR_SPE) {
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#ifdef CONFIG_SMP
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BUG_ON(tsk != current);
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#endif
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tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
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giveup_spe(tsk);
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}
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preempt_enable();
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}
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}
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#endif /* CONFIG_SPE */
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#ifndef CONFIG_SMP
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/*
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* If we are doing lazy switching of CPU state (FP, altivec or SPE),
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* and the current task has some state, discard it.
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*/
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void discard_lazy_cpu_state(void)
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{
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preempt_disable();
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if (last_task_used_math == current)
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last_task_used_math = NULL;
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#ifdef CONFIG_ALTIVEC
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if (last_task_used_altivec == current)
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last_task_used_altivec = NULL;
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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if (last_task_used_vsx == current)
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last_task_used_vsx = NULL;
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_SPE
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if (last_task_used_spe == current)
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last_task_used_spe = NULL;
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#endif
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preempt_enable();
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}
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#endif /* CONFIG_SMP */
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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void do_send_trap(struct pt_regs *regs, unsigned long address,
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unsigned long error_code, int signal_code, int breakpt)
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{
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siginfo_t info;
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current->thread.trap_nr = signal_code;
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if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
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11, SIGSEGV) == NOTIFY_STOP)
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return;
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/* Deliver the signal to userspace */
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info.si_signo = SIGTRAP;
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info.si_errno = breakpt; /* breakpoint or watchpoint id */
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info.si_code = signal_code;
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info.si_addr = (void __user *)address;
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force_sig_info(SIGTRAP, &info, current);
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}
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#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
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void do_dabr(struct pt_regs *regs, unsigned long address,
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unsigned long error_code)
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{
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siginfo_t info;
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current->thread.trap_nr = TRAP_HWBKPT;
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if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
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11, SIGSEGV) == NOTIFY_STOP)
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return;
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if (debugger_dabr_match(regs))
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return;
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/* Clear the DABR */
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set_dabr(0, 0);
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/* Deliver the signal to userspace */
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info.si_signo = SIGTRAP;
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info.si_errno = 0;
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info.si_code = TRAP_HWBKPT;
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info.si_addr = (void __user *)address;
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force_sig_info(SIGTRAP, &info, current);
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}
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#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
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static DEFINE_PER_CPU(unsigned long, current_dabr);
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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/*
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* Set the debug registers back to their default "safe" values.
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*/
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static void set_debug_reg_defaults(struct thread_struct *thread)
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{
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thread->iac1 = thread->iac2 = 0;
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#if CONFIG_PPC_ADV_DEBUG_IACS > 2
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thread->iac3 = thread->iac4 = 0;
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#endif
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thread->dac1 = thread->dac2 = 0;
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#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
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thread->dvc1 = thread->dvc2 = 0;
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#endif
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thread->dbcr0 = 0;
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#ifdef CONFIG_BOOKE
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/*
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* Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
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*/
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thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
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DBCR1_IAC3US | DBCR1_IAC4US;
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/*
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* Force Data Address Compare User/Supervisor bits to be User-only
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* (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
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*/
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thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
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#else
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thread->dbcr1 = 0;
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#endif
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}
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static void prime_debug_regs(struct thread_struct *thread)
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{
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mtspr(SPRN_IAC1, thread->iac1);
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mtspr(SPRN_IAC2, thread->iac2);
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#if CONFIG_PPC_ADV_DEBUG_IACS > 2
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mtspr(SPRN_IAC3, thread->iac3);
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mtspr(SPRN_IAC4, thread->iac4);
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#endif
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mtspr(SPRN_DAC1, thread->dac1);
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mtspr(SPRN_DAC2, thread->dac2);
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#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
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mtspr(SPRN_DVC1, thread->dvc1);
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mtspr(SPRN_DVC2, thread->dvc2);
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#endif
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mtspr(SPRN_DBCR0, thread->dbcr0);
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mtspr(SPRN_DBCR1, thread->dbcr1);
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#ifdef CONFIG_BOOKE
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mtspr(SPRN_DBCR2, thread->dbcr2);
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#endif
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}
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/*
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* Unless neither the old or new thread are making use of the
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* debug registers, set the debug registers from the values
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* stored in the new thread.
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*/
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static void switch_booke_debug_regs(struct thread_struct *new_thread)
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{
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if ((current->thread.dbcr0 & DBCR0_IDM)
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|| (new_thread->dbcr0 & DBCR0_IDM))
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prime_debug_regs(new_thread);
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}
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#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
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#ifndef CONFIG_HAVE_HW_BREAKPOINT
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static void set_debug_reg_defaults(struct thread_struct *thread)
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{
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if (thread->dabr) {
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thread->dabr = 0;
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thread->dabrx = 0;
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set_dabr(0, 0);
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}
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}
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#endif /* !CONFIG_HAVE_HW_BREAKPOINT */
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#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
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int set_dabr(unsigned long dabr, unsigned long dabrx)
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{
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__get_cpu_var(current_dabr) = dabr;
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if (ppc_md.set_dabr)
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return ppc_md.set_dabr(dabr, dabrx);
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/* XXX should we have a CPU_FTR_HAS_DABR ? */
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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mtspr(SPRN_DAC1, dabr);
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#ifdef CONFIG_PPC_47x
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isync();
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#endif
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#elif defined(CONFIG_PPC_BOOK3S)
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mtspr(SPRN_DABR, dabr);
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mtspr(SPRN_DABRX, dabrx);
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#endif
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return 0;
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}
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#ifdef CONFIG_PPC64
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DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
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#endif
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struct task_struct *__switch_to(struct task_struct *prev,
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struct task_struct *new)
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{
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struct thread_struct *new_thread, *old_thread;
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unsigned long flags;
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struct task_struct *last;
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#ifdef CONFIG_PPC_BOOK3S_64
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struct ppc64_tlb_batch *batch;
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#endif
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|
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#ifdef CONFIG_SMP
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/* avoid complexity of lazy save/restore of fpu
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* by just saving it every time we switch out if
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* this task used the fpu during the last quantum.
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*
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* If it tries to use the fpu again, it'll trap and
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* reload its fp regs. So we don't have to do a restore
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* every switch, just a save.
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* -- Cort
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*/
|
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if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
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giveup_fpu(prev);
|
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#ifdef CONFIG_ALTIVEC
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/*
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* If the previous thread used altivec in the last quantum
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* (thus changing altivec regs) then save them.
|
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* We used to check the VRSAVE register but not all apps
|
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* set it, so we don't rely on it now (and in fact we need
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* to save & restore VSCR even if VRSAVE == 0). -- paulus
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*
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* On SMP we always save/restore altivec regs just to avoid the
|
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* complexity of changing processors.
|
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* -- Cort
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*/
|
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if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
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giveup_altivec(prev);
|
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#endif /* CONFIG_ALTIVEC */
|
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#ifdef CONFIG_VSX
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if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
|
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/* VMX and FPU registers are already save here */
|
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__giveup_vsx(prev);
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#endif /* CONFIG_VSX */
|
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#ifdef CONFIG_SPE
|
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/*
|
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* If the previous thread used spe in the last quantum
|
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* (thus changing spe regs) then save them.
|
|
*
|
|
* On SMP we always save/restore spe regs just to avoid the
|
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* complexity of changing processors.
|
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*/
|
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if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
|
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giveup_spe(prev);
|
|
#endif /* CONFIG_SPE */
|
|
|
|
#else /* CONFIG_SMP */
|
|
#ifdef CONFIG_ALTIVEC
|
|
/* Avoid the trap. On smp this this never happens since
|
|
* we don't set last_task_used_altivec -- Cort
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|
*/
|
|
if (new->thread.regs && last_task_used_altivec == new)
|
|
new->thread.regs->msr |= MSR_VEC;
|
|
#endif /* CONFIG_ALTIVEC */
|
|
#ifdef CONFIG_VSX
|
|
if (new->thread.regs && last_task_used_vsx == new)
|
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new->thread.regs->msr |= MSR_VSX;
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#endif /* CONFIG_VSX */
|
|
#ifdef CONFIG_SPE
|
|
/* Avoid the trap. On smp this this never happens since
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* we don't set last_task_used_spe
|
|
*/
|
|
if (new->thread.regs && last_task_used_spe == new)
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new->thread.regs->msr |= MSR_SPE;
|
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#endif /* CONFIG_SPE */
|
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|
|
#endif /* CONFIG_SMP */
|
|
|
|
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
|
switch_booke_debug_regs(&new->thread);
|
|
#else
|
|
/*
|
|
* For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
|
|
* schedule DABR
|
|
*/
|
|
#ifndef CONFIG_HAVE_HW_BREAKPOINT
|
|
if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
|
|
set_dabr(new->thread.dabr, new->thread.dabrx);
|
|
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
|
|
#endif
|
|
|
|
|
|
new_thread = &new->thread;
|
|
old_thread = ¤t->thread;
|
|
|
|
#ifdef CONFIG_PPC64
|
|
/*
|
|
* Collect processor utilization data per process
|
|
*/
|
|
if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
|
|
struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
|
|
long unsigned start_tb, current_tb;
|
|
start_tb = old_thread->start_tb;
|
|
cu->current_tb = current_tb = mfspr(SPRN_PURR);
|
|
old_thread->accum_tb += (current_tb - start_tb);
|
|
new_thread->start_tb = current_tb;
|
|
}
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
batch = &__get_cpu_var(ppc64_tlb_batch);
|
|
if (batch->active) {
|
|
current_thread_info()->local_flags |= _TLF_LAZY_MMU;
|
|
if (batch->index)
|
|
__flush_tlb_pending(batch);
|
|
batch->active = 0;
|
|
}
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
|
|
|
local_irq_save(flags);
|
|
|
|
/*
|
|
* We can't take a PMU exception inside _switch() since there is a
|
|
* window where the kernel stack SLB and the kernel stack are out
|
|
* of sync. Hard disable here.
|
|
*/
|
|
hard_irq_disable();
|
|
last = _switch(old_thread, new_thread);
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
|
|
current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
|
|
batch = &__get_cpu_var(ppc64_tlb_batch);
|
|
batch->active = 1;
|
|
}
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
|
|
|
local_irq_restore(flags);
|
|
|
|
return last;
|
|
}
|
|
|
|
static int instructions_to_print = 16;
|
|
|
|
static void show_instructions(struct pt_regs *regs)
|
|
{
|
|
int i;
|
|
unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
|
|
sizeof(int));
|
|
|
|
printk("Instruction dump:");
|
|
|
|
for (i = 0; i < instructions_to_print; i++) {
|
|
int instr;
|
|
|
|
if (!(i % 8))
|
|
printk("\n");
|
|
|
|
#if !defined(CONFIG_BOOKE)
|
|
/* If executing with the IMMU off, adjust pc rather
|
|
* than print XXXXXXXX.
|
|
*/
|
|
if (!(regs->msr & MSR_IR))
|
|
pc = (unsigned long)phys_to_virt(pc);
|
|
#endif
|
|
|
|
/* We use __get_user here *only* to avoid an OOPS on a
|
|
* bad address because the pc *should* only be a
|
|
* kernel address.
|
|
*/
|
|
if (!__kernel_text_address(pc) ||
|
|
__get_user(instr, (unsigned int __user *)pc)) {
|
|
printk(KERN_CONT "XXXXXXXX ");
|
|
} else {
|
|
if (regs->nip == pc)
|
|
printk(KERN_CONT "<%08x> ", instr);
|
|
else
|
|
printk(KERN_CONT "%08x ", instr);
|
|
}
|
|
|
|
pc += sizeof(int);
|
|
}
|
|
|
|
printk("\n");
|
|
}
|
|
|
|
static struct regbit {
|
|
unsigned long bit;
|
|
const char *name;
|
|
} msr_bits[] = {
|
|
#if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
|
|
{MSR_SF, "SF"},
|
|
{MSR_HV, "HV"},
|
|
#endif
|
|
{MSR_VEC, "VEC"},
|
|
{MSR_VSX, "VSX"},
|
|
#ifdef CONFIG_BOOKE
|
|
{MSR_CE, "CE"},
|
|
#endif
|
|
{MSR_EE, "EE"},
|
|
{MSR_PR, "PR"},
|
|
{MSR_FP, "FP"},
|
|
{MSR_ME, "ME"},
|
|
#ifdef CONFIG_BOOKE
|
|
{MSR_DE, "DE"},
|
|
#else
|
|
{MSR_SE, "SE"},
|
|
{MSR_BE, "BE"},
|
|
#endif
|
|
{MSR_IR, "IR"},
|
|
{MSR_DR, "DR"},
|
|
{MSR_PMM, "PMM"},
|
|
#ifndef CONFIG_BOOKE
|
|
{MSR_RI, "RI"},
|
|
{MSR_LE, "LE"},
|
|
#endif
|
|
{0, NULL}
|
|
};
|
|
|
|
static void printbits(unsigned long val, struct regbit *bits)
|
|
{
|
|
const char *sep = "";
|
|
|
|
printk("<");
|
|
for (; bits->bit; ++bits)
|
|
if (val & bits->bit) {
|
|
printk("%s%s", sep, bits->name);
|
|
sep = ",";
|
|
}
|
|
printk(">");
|
|
}
|
|
|
|
#ifdef CONFIG_PPC64
|
|
#define REG "%016lx"
|
|
#define REGS_PER_LINE 4
|
|
#define LAST_VOLATILE 13
|
|
#else
|
|
#define REG "%08lx"
|
|
#define REGS_PER_LINE 8
|
|
#define LAST_VOLATILE 12
|
|
#endif
|
|
|
|
void show_regs(struct pt_regs * regs)
|
|
{
|
|
int i, trap;
|
|
|
|
printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
|
|
regs->nip, regs->link, regs->ctr);
|
|
printk("REGS: %p TRAP: %04lx %s (%s)\n",
|
|
regs, regs->trap, print_tainted(), init_utsname()->release);
|
|
printk("MSR: "REG" ", regs->msr);
|
|
printbits(regs->msr, msr_bits);
|
|
printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
|
|
#ifdef CONFIG_PPC64
|
|
printk("SOFTE: %ld\n", regs->softe);
|
|
#endif
|
|
trap = TRAP(regs);
|
|
if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
|
|
printk("CFAR: "REG"\n", regs->orig_gpr3);
|
|
if (trap == 0x300 || trap == 0x600)
|
|
#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
|
|
printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
|
|
#else
|
|
printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
|
|
#endif
|
|
printk("TASK = %p[%d] '%s' THREAD: %p",
|
|
current, task_pid_nr(current), current->comm, task_thread_info(current));
|
|
|
|
#ifdef CONFIG_SMP
|
|
printk(" CPU: %d", raw_smp_processor_id());
|
|
#endif /* CONFIG_SMP */
|
|
|
|
for (i = 0; i < 32; i++) {
|
|
if ((i % REGS_PER_LINE) == 0)
|
|
printk("\nGPR%02d: ", i);
|
|
printk(REG " ", regs->gpr[i]);
|
|
if (i == LAST_VOLATILE && !FULL_REGS(regs))
|
|
break;
|
|
}
|
|
printk("\n");
|
|
#ifdef CONFIG_KALLSYMS
|
|
/*
|
|
* Lookup NIP late so we have the best change of getting the
|
|
* above info out without failing
|
|
*/
|
|
printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
|
|
printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
|
|
#endif
|
|
show_stack(current, (unsigned long *) regs->gpr[1]);
|
|
if (!user_mode(regs))
|
|
show_instructions(regs);
|
|
}
|
|
|
|
void exit_thread(void)
|
|
{
|
|
discard_lazy_cpu_state();
|
|
}
|
|
|
|
void flush_thread(void)
|
|
{
|
|
discard_lazy_cpu_state();
|
|
|
|
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
|
flush_ptrace_hw_breakpoint(current);
|
|
#else /* CONFIG_HAVE_HW_BREAKPOINT */
|
|
set_debug_reg_defaults(¤t->thread);
|
|
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
|
|
}
|
|
|
|
void
|
|
release_thread(struct task_struct *t)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* this gets called so that we can store coprocessor state into memory and
|
|
* copy the current task into the new thread.
|
|
*/
|
|
int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
|
|
{
|
|
flush_fp_to_thread(src);
|
|
flush_altivec_to_thread(src);
|
|
flush_vsx_to_thread(src);
|
|
flush_spe_to_thread(src);
|
|
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
|
flush_ptrace_hw_breakpoint(src);
|
|
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
|
|
|
|
*dst = *src;
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Copy a thread..
|
|
*/
|
|
extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
|
|
|
|
int copy_thread(unsigned long clone_flags, unsigned long usp,
|
|
unsigned long arg, struct task_struct *p,
|
|
struct pt_regs *regs)
|
|
{
|
|
struct pt_regs *childregs, *kregs;
|
|
extern void ret_from_fork(void);
|
|
extern void ret_from_kernel_thread(void);
|
|
void (*f)(void);
|
|
unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
|
|
|
|
/* Copy registers */
|
|
sp -= sizeof(struct pt_regs);
|
|
childregs = (struct pt_regs *) sp;
|
|
if (!regs) {
|
|
/* for kernel thread, set `current' and stackptr in new task */
|
|
memset(childregs, 0, sizeof(struct pt_regs));
|
|
childregs->gpr[1] = sp + sizeof(struct pt_regs);
|
|
#ifdef CONFIG_PPC64
|
|
childregs->gpr[14] = *(unsigned long *)usp;
|
|
childregs->gpr[2] = ((unsigned long *)usp)[1],
|
|
clear_tsk_thread_flag(p, TIF_32BIT);
|
|
#else
|
|
childregs->gpr[14] = usp; /* function */
|
|
childregs->gpr[2] = (unsigned long) p;
|
|
#endif
|
|
childregs->gpr[15] = arg;
|
|
p->thread.regs = NULL; /* no user register state */
|
|
f = ret_from_kernel_thread;
|
|
} else {
|
|
CHECK_FULL_REGS(regs);
|
|
*childregs = *regs;
|
|
childregs->gpr[1] = usp;
|
|
p->thread.regs = childregs;
|
|
childregs->gpr[3] = 0; /* Result from fork() */
|
|
if (clone_flags & CLONE_SETTLS) {
|
|
#ifdef CONFIG_PPC64
|
|
if (!is_32bit_task())
|
|
childregs->gpr[13] = childregs->gpr[6];
|
|
else
|
|
#endif
|
|
childregs->gpr[2] = childregs->gpr[6];
|
|
}
|
|
|
|
f = ret_from_fork;
|
|
}
|
|
sp -= STACK_FRAME_OVERHEAD;
|
|
|
|
/*
|
|
* The way this works is that at some point in the future
|
|
* some task will call _switch to switch to the new task.
|
|
* That will pop off the stack frame created below and start
|
|
* the new task running at ret_from_fork. The new task will
|
|
* do some house keeping and then return from the fork or clone
|
|
* system call, using the stack frame created above.
|
|
*/
|
|
sp -= sizeof(struct pt_regs);
|
|
kregs = (struct pt_regs *) sp;
|
|
sp -= STACK_FRAME_OVERHEAD;
|
|
p->thread.ksp = sp;
|
|
p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
|
|
_ALIGN_UP(sizeof(struct thread_info), 16);
|
|
|
|
#ifdef CONFIG_PPC_STD_MMU_64
|
|
if (mmu_has_feature(MMU_FTR_SLB)) {
|
|
unsigned long sp_vsid;
|
|
unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
|
|
|
|
if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
|
|
sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
|
|
<< SLB_VSID_SHIFT_1T;
|
|
else
|
|
sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
|
|
<< SLB_VSID_SHIFT;
|
|
sp_vsid |= SLB_VSID_KERNEL | llp;
|
|
p->thread.ksp_vsid = sp_vsid;
|
|
}
|
|
#endif /* CONFIG_PPC_STD_MMU_64 */
|
|
#ifdef CONFIG_PPC64
|
|
if (cpu_has_feature(CPU_FTR_DSCR)) {
|
|
p->thread.dscr_inherit = current->thread.dscr_inherit;
|
|
p->thread.dscr = current->thread.dscr;
|
|
}
|
|
#endif
|
|
/*
|
|
* The PPC64 ABI makes use of a TOC to contain function
|
|
* pointers. The function (ret_from_except) is actually a pointer
|
|
* to the TOC entry. The first entry is a pointer to the actual
|
|
* function.
|
|
*/
|
|
#ifdef CONFIG_PPC64
|
|
kregs->nip = *((unsigned long *)f);
|
|
#else
|
|
kregs->nip = (unsigned long)f;
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Set up a thread for executing a new program
|
|
*/
|
|
void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
|
|
{
|
|
#ifdef CONFIG_PPC64
|
|
unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
|
|
#endif
|
|
|
|
/*
|
|
* If we exec out of a kernel thread then thread.regs will not be
|
|
* set. Do it now.
|
|
*/
|
|
if (!current->thread.regs) {
|
|
struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
|
|
current->thread.regs = regs - 1;
|
|
}
|
|
|
|
memset(regs->gpr, 0, sizeof(regs->gpr));
|
|
regs->ctr = 0;
|
|
regs->link = 0;
|
|
regs->xer = 0;
|
|
regs->ccr = 0;
|
|
regs->gpr[1] = sp;
|
|
|
|
/*
|
|
* We have just cleared all the nonvolatile GPRs, so make
|
|
* FULL_REGS(regs) return true. This is necessary to allow
|
|
* ptrace to examine the thread immediately after exec.
|
|
*/
|
|
regs->trap &= ~1UL;
|
|
|
|
#ifdef CONFIG_PPC32
|
|
regs->mq = 0;
|
|
regs->nip = start;
|
|
regs->msr = MSR_USER;
|
|
#else
|
|
if (!is_32bit_task()) {
|
|
unsigned long entry, toc;
|
|
|
|
/* start is a relocated pointer to the function descriptor for
|
|
* the elf _start routine. The first entry in the function
|
|
* descriptor is the entry address of _start and the second
|
|
* entry is the TOC value we need to use.
|
|
*/
|
|
__get_user(entry, (unsigned long __user *)start);
|
|
__get_user(toc, (unsigned long __user *)start+1);
|
|
|
|
/* Check whether the e_entry function descriptor entries
|
|
* need to be relocated before we can use them.
|
|
*/
|
|
if (load_addr != 0) {
|
|
entry += load_addr;
|
|
toc += load_addr;
|
|
}
|
|
regs->nip = entry;
|
|
regs->gpr[2] = toc;
|
|
regs->msr = MSR_USER64;
|
|
} else {
|
|
regs->nip = start;
|
|
regs->gpr[2] = 0;
|
|
regs->msr = MSR_USER32;
|
|
}
|
|
#endif
|
|
|
|
discard_lazy_cpu_state();
|
|
#ifdef CONFIG_VSX
|
|
current->thread.used_vsr = 0;
|
|
#endif
|
|
memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
|
|
current->thread.fpscr.val = 0;
|
|
#ifdef CONFIG_ALTIVEC
|
|
memset(current->thread.vr, 0, sizeof(current->thread.vr));
|
|
memset(¤t->thread.vscr, 0, sizeof(current->thread.vscr));
|
|
current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
|
|
current->thread.vrsave = 0;
|
|
current->thread.used_vr = 0;
|
|
#endif /* CONFIG_ALTIVEC */
|
|
#ifdef CONFIG_SPE
|
|
memset(current->thread.evr, 0, sizeof(current->thread.evr));
|
|
current->thread.acc = 0;
|
|
current->thread.spefscr = 0;
|
|
current->thread.used_spe = 0;
|
|
#endif /* CONFIG_SPE */
|
|
}
|
|
|
|
#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
|
|
| PR_FP_EXC_RES | PR_FP_EXC_INV)
|
|
|
|
int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
|
|
{
|
|
struct pt_regs *regs = tsk->thread.regs;
|
|
|
|
/* This is a bit hairy. If we are an SPE enabled processor
|
|
* (have embedded fp) we store the IEEE exception enable flags in
|
|
* fpexc_mode. fpexc_mode is also used for setting FP exception
|
|
* mode (asyn, precise, disabled) for 'Classic' FP. */
|
|
if (val & PR_FP_EXC_SW_ENABLE) {
|
|
#ifdef CONFIG_SPE
|
|
if (cpu_has_feature(CPU_FTR_SPE)) {
|
|
tsk->thread.fpexc_mode = val &
|
|
(PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
|
|
return 0;
|
|
} else {
|
|
return -EINVAL;
|
|
}
|
|
#else
|
|
return -EINVAL;
|
|
#endif
|
|
}
|
|
|
|
/* on a CONFIG_SPE this does not hurt us. The bits that
|
|
* __pack_fe01 use do not overlap with bits used for
|
|
* PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
|
|
* on CONFIG_SPE implementations are reserved so writing to
|
|
* them does not change anything */
|
|
if (val > PR_FP_EXC_PRECISE)
|
|
return -EINVAL;
|
|
tsk->thread.fpexc_mode = __pack_fe01(val);
|
|
if (regs != NULL && (regs->msr & MSR_FP) != 0)
|
|
regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
|
|
| tsk->thread.fpexc_mode;
|
|
return 0;
|
|
}
|
|
|
|
int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
|
|
{
|
|
unsigned int val;
|
|
|
|
if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
|
|
#ifdef CONFIG_SPE
|
|
if (cpu_has_feature(CPU_FTR_SPE))
|
|
val = tsk->thread.fpexc_mode;
|
|
else
|
|
return -EINVAL;
|
|
#else
|
|
return -EINVAL;
|
|
#endif
|
|
else
|
|
val = __unpack_fe01(tsk->thread.fpexc_mode);
|
|
return put_user(val, (unsigned int __user *) adr);
|
|
}
|
|
|
|
int set_endian(struct task_struct *tsk, unsigned int val)
|
|
{
|
|
struct pt_regs *regs = tsk->thread.regs;
|
|
|
|
if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
|
|
(val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
|
|
return -EINVAL;
|
|
|
|
if (regs == NULL)
|
|
return -EINVAL;
|
|
|
|
if (val == PR_ENDIAN_BIG)
|
|
regs->msr &= ~MSR_LE;
|
|
else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
|
|
regs->msr |= MSR_LE;
|
|
else
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int get_endian(struct task_struct *tsk, unsigned long adr)
|
|
{
|
|
struct pt_regs *regs = tsk->thread.regs;
|
|
unsigned int val;
|
|
|
|
if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
|
|
!cpu_has_feature(CPU_FTR_REAL_LE))
|
|
return -EINVAL;
|
|
|
|
if (regs == NULL)
|
|
return -EINVAL;
|
|
|
|
if (regs->msr & MSR_LE) {
|
|
if (cpu_has_feature(CPU_FTR_REAL_LE))
|
|
val = PR_ENDIAN_LITTLE;
|
|
else
|
|
val = PR_ENDIAN_PPC_LITTLE;
|
|
} else
|
|
val = PR_ENDIAN_BIG;
|
|
|
|
return put_user(val, (unsigned int __user *)adr);
|
|
}
|
|
|
|
int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
|
|
{
|
|
tsk->thread.align_ctl = val;
|
|
return 0;
|
|
}
|
|
|
|
int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
|
|
{
|
|
return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
|
|
}
|
|
|
|
#define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
|
|
|
|
int sys_clone(unsigned long clone_flags, unsigned long usp,
|
|
int __user *parent_tidp, void __user *child_threadptr,
|
|
int __user *child_tidp, int p6,
|
|
struct pt_regs *regs)
|
|
{
|
|
CHECK_FULL_REGS(regs);
|
|
if (usp == 0)
|
|
usp = regs->gpr[1]; /* stack pointer for child */
|
|
#ifdef CONFIG_PPC64
|
|
if (is_32bit_task()) {
|
|
parent_tidp = TRUNC_PTR(parent_tidp);
|
|
child_tidp = TRUNC_PTR(child_tidp);
|
|
}
|
|
#endif
|
|
return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
|
|
}
|
|
|
|
int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
|
|
unsigned long p4, unsigned long p5, unsigned long p6,
|
|
struct pt_regs *regs)
|
|
{
|
|
CHECK_FULL_REGS(regs);
|
|
return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
|
|
}
|
|
|
|
int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
|
|
unsigned long p4, unsigned long p5, unsigned long p6,
|
|
struct pt_regs *regs)
|
|
{
|
|
CHECK_FULL_REGS(regs);
|
|
return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
|
|
regs, 0, NULL, NULL);
|
|
}
|
|
|
|
void __ret_from_kernel_execve(struct pt_regs *normal)
|
|
__noreturn;
|
|
|
|
void ret_from_kernel_execve(struct pt_regs *normal)
|
|
{
|
|
set_thread_flag(TIF_RESTOREALL);
|
|
__ret_from_kernel_execve(normal);
|
|
}
|
|
|
|
static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
|
|
unsigned long nbytes)
|
|
{
|
|
unsigned long stack_page;
|
|
unsigned long cpu = task_cpu(p);
|
|
|
|
/*
|
|
* Avoid crashing if the stack has overflowed and corrupted
|
|
* task_cpu(p), which is in the thread_info struct.
|
|
*/
|
|
if (cpu < NR_CPUS && cpu_possible(cpu)) {
|
|
stack_page = (unsigned long) hardirq_ctx[cpu];
|
|
if (sp >= stack_page + sizeof(struct thread_struct)
|
|
&& sp <= stack_page + THREAD_SIZE - nbytes)
|
|
return 1;
|
|
|
|
stack_page = (unsigned long) softirq_ctx[cpu];
|
|
if (sp >= stack_page + sizeof(struct thread_struct)
|
|
&& sp <= stack_page + THREAD_SIZE - nbytes)
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int validate_sp(unsigned long sp, struct task_struct *p,
|
|
unsigned long nbytes)
|
|
{
|
|
unsigned long stack_page = (unsigned long)task_stack_page(p);
|
|
|
|
if (sp >= stack_page + sizeof(struct thread_struct)
|
|
&& sp <= stack_page + THREAD_SIZE - nbytes)
|
|
return 1;
|
|
|
|
return valid_irq_stack(sp, p, nbytes);
|
|
}
|
|
|
|
EXPORT_SYMBOL(validate_sp);
|
|
|
|
unsigned long get_wchan(struct task_struct *p)
|
|
{
|
|
unsigned long ip, sp;
|
|
int count = 0;
|
|
|
|
if (!p || p == current || p->state == TASK_RUNNING)
|
|
return 0;
|
|
|
|
sp = p->thread.ksp;
|
|
if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
|
|
return 0;
|
|
|
|
do {
|
|
sp = *(unsigned long *)sp;
|
|
if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
|
|
return 0;
|
|
if (count > 0) {
|
|
ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
|
|
if (!in_sched_functions(ip))
|
|
return ip;
|
|
}
|
|
} while (count++ < 16);
|
|
return 0;
|
|
}
|
|
|
|
static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
|
|
|
|
void show_stack(struct task_struct *tsk, unsigned long *stack)
|
|
{
|
|
unsigned long sp, ip, lr, newsp;
|
|
int count = 0;
|
|
int firstframe = 1;
|
|
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
|
int curr_frame = current->curr_ret_stack;
|
|
extern void return_to_handler(void);
|
|
unsigned long rth = (unsigned long)return_to_handler;
|
|
unsigned long mrth = -1;
|
|
#ifdef CONFIG_PPC64
|
|
extern void mod_return_to_handler(void);
|
|
rth = *(unsigned long *)rth;
|
|
mrth = (unsigned long)mod_return_to_handler;
|
|
mrth = *(unsigned long *)mrth;
|
|
#endif
|
|
#endif
|
|
|
|
sp = (unsigned long) stack;
|
|
if (tsk == NULL)
|
|
tsk = current;
|
|
if (sp == 0) {
|
|
if (tsk == current)
|
|
asm("mr %0,1" : "=r" (sp));
|
|
else
|
|
sp = tsk->thread.ksp;
|
|
}
|
|
|
|
lr = 0;
|
|
printk("Call Trace:\n");
|
|
do {
|
|
if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
|
|
return;
|
|
|
|
stack = (unsigned long *) sp;
|
|
newsp = stack[0];
|
|
ip = stack[STACK_FRAME_LR_SAVE];
|
|
if (!firstframe || ip != lr) {
|
|
printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
|
|
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
|
if ((ip == rth || ip == mrth) && curr_frame >= 0) {
|
|
printk(" (%pS)",
|
|
(void *)current->ret_stack[curr_frame].ret);
|
|
curr_frame--;
|
|
}
|
|
#endif
|
|
if (firstframe)
|
|
printk(" (unreliable)");
|
|
printk("\n");
|
|
}
|
|
firstframe = 0;
|
|
|
|
/*
|
|
* See if this is an exception frame.
|
|
* We look for the "regshere" marker in the current frame.
|
|
*/
|
|
if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
|
|
&& stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
|
|
struct pt_regs *regs = (struct pt_regs *)
|
|
(sp + STACK_FRAME_OVERHEAD);
|
|
lr = regs->link;
|
|
printk("--- Exception: %lx at %pS\n LR = %pS\n",
|
|
regs->trap, (void *)regs->nip, (void *)lr);
|
|
firstframe = 1;
|
|
}
|
|
|
|
sp = newsp;
|
|
} while (count++ < kstack_depth_to_print);
|
|
}
|
|
|
|
void dump_stack(void)
|
|
{
|
|
show_stack(current, NULL);
|
|
}
|
|
EXPORT_SYMBOL(dump_stack);
|
|
|
|
#ifdef CONFIG_PPC64
|
|
/* Called with hard IRQs off */
|
|
void __ppc64_runlatch_on(void)
|
|
{
|
|
struct thread_info *ti = current_thread_info();
|
|
unsigned long ctrl;
|
|
|
|
ctrl = mfspr(SPRN_CTRLF);
|
|
ctrl |= CTRL_RUNLATCH;
|
|
mtspr(SPRN_CTRLT, ctrl);
|
|
|
|
ti->local_flags |= _TLF_RUNLATCH;
|
|
}
|
|
|
|
/* Called with hard IRQs off */
|
|
void __ppc64_runlatch_off(void)
|
|
{
|
|
struct thread_info *ti = current_thread_info();
|
|
unsigned long ctrl;
|
|
|
|
ti->local_flags &= ~_TLF_RUNLATCH;
|
|
|
|
ctrl = mfspr(SPRN_CTRLF);
|
|
ctrl &= ~CTRL_RUNLATCH;
|
|
mtspr(SPRN_CTRLT, ctrl);
|
|
}
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
unsigned long arch_align_stack(unsigned long sp)
|
|
{
|
|
if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
|
|
sp -= get_random_int() & ~PAGE_MASK;
|
|
return sp & ~0xf;
|
|
}
|
|
|
|
static inline unsigned long brk_rnd(void)
|
|
{
|
|
unsigned long rnd = 0;
|
|
|
|
/* 8MB for 32bit, 1GB for 64bit */
|
|
if (is_32bit_task())
|
|
rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
|
|
else
|
|
rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
|
|
|
|
return rnd << PAGE_SHIFT;
|
|
}
|
|
|
|
unsigned long arch_randomize_brk(struct mm_struct *mm)
|
|
{
|
|
unsigned long base = mm->brk;
|
|
unsigned long ret;
|
|
|
|
#ifdef CONFIG_PPC_STD_MMU_64
|
|
/*
|
|
* If we are using 1TB segments and we are allowed to randomise
|
|
* the heap, we can put it above 1TB so it is backed by a 1TB
|
|
* segment. Otherwise the heap will be in the bottom 1TB
|
|
* which always uses 256MB segments and this may result in a
|
|
* performance penalty.
|
|
*/
|
|
if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
|
|
base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
|
|
#endif
|
|
|
|
ret = PAGE_ALIGN(base + brk_rnd());
|
|
|
|
if (ret < mm->brk)
|
|
return mm->brk;
|
|
|
|
return ret;
|
|
}
|
|
|
|
unsigned long randomize_et_dyn(unsigned long base)
|
|
{
|
|
unsigned long ret = PAGE_ALIGN(base + brk_rnd());
|
|
|
|
if (ret < base)
|
|
return base;
|
|
|
|
return ret;
|
|
}
|