Andy Shevchenko d8ded50f8b dmaengine: dw: define DW_DMA_MAX_NR_MASTERS ... Instead of using magic number in the code the patch provides DW_DMA_MAX_NR_MASTERS constant. While here, restrict the reading of data width array by amount of the actual number of AHB masters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>		2015-02-04 22:39:44 -08:00
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abilis_tb10x.dtsi	dmaengine: dw: define DW_DMA_MAX_NR_MASTERS	2015-02-04 22:39:44 -08:00
abilis_tb100.dtsi	ARC: [TB10x] Updates for GPIO and pinctrl	2013-11-11 09:57:44 +05:30
abilis_tb100_dvk.dts	ARC: [TB10x] Updates for GPIO and pinctrl	2013-11-11 09:57:44 +05:30
abilis_tb101.dtsi	ARC: [TB10x] Updates for GPIO and pinctrl	2013-11-11 09:57:44 +05:30
abilis_tb101_dvk.dts	ARC: [TB10x] Updates for GPIO and pinctrl	2013-11-11 09:57:44 +05:30
angel4.dts	ARC: [arcfpga] consolidate machine description, DT	2014-10-13 14:46:12 +05:30
Makefile	ARC: [kbuild] Avoid DTB rebuilds if DTS are untouched	2013-04-17 18:19:14 +05:30
nsimosci.dts	ARC: [nsimosci] move peripherals to match model to FPGA	2014-12-15 11:24:58 +05:30
skeleton.dtsi	ARC: [plat-arcfpga]: Enabling DeviceTree for Angel4 board	2013-02-15 23:15:57 +05:30