Sonic Zhang 86794b4356 blackfin: SEC: clean up SEC interrupt initialization ... Append the SEC IRQ after the IVG6, which is consistent to BF5xx SIC. Exclude SIC irqchip fucntions from SEC code. Call handle_fasteoi_irq in SEC error and fault handler. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>		2012-12-14 11:20:22 +08:00
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anomaly.h	bf60x: fix build warning	2012-07-24 13:39:53 +08:00
bf609.h
bfin_serial.h
blackfin.h
cdefBF60x_base.h	blackfin: bf60x: Rename the DDR controller macro	2012-05-21 14:54:57 +08:00
cdefBF609.h
defBF60x_base.h	bfin: reorg clock init steps for bf609	2012-07-24 13:39:49 +08:00
defBF609.h	Blackfin: bf60x: Add bf608 and bf609 specific perpheral MMRs	2012-10-08 14:36:29 +08:00
dma.h
gpio.h	bf60x: sec: Clean up interrupt initialization code for SEC.	2012-07-24 13:39:51 +08:00
irq.h	blackfin: SEC: clean up SEC interrupt initialization	2012-12-14 11:20:22 +08:00
mem_map.h	blackfin: bf60x: cleanup mem_map macro	2012-05-21 14:54:27 +08:00
pll.h
pm.h	bf60x: pm: add smc nor flash syscore ops	2012-07-24 13:39:50 +08:00
portmux.h