1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
451 lines
11 KiB
C
451 lines
11 KiB
C
/* sun4m_smp.c: Sparc SUN4M SMP support.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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*/
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#include <asm/head.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/threads.h>
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#include <linux/smp.h>
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#include <linux/smp_lock.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/profile.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/ptrace.h>
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#include <asm/atomic.h>
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#include <asm/delay.h>
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#include <asm/irq.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/oplib.h>
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#include <asm/cpudata.h>
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#define IRQ_RESCHEDULE 13
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#define IRQ_STOP_CPU 14
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#define IRQ_CROSS_CALL 15
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extern ctxd_t *srmmu_ctx_table_phys;
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extern void calibrate_delay(void);
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extern volatile int smp_processors_ready;
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extern int smp_num_cpus;
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extern volatile unsigned long cpu_callin_map[NR_CPUS];
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extern unsigned char boot_cpu_id;
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extern int smp_activated;
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extern volatile int __cpu_number_map[NR_CPUS];
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extern volatile int __cpu_logical_map[NR_CPUS];
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extern volatile unsigned long ipi_count;
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extern volatile int smp_process_available;
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extern volatile int smp_commenced;
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extern int __smp4m_processor_id(void);
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/*#define SMP_DEBUG*/
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#ifdef SMP_DEBUG
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#define SMP_PRINTK(x) printk x
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#else
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#define SMP_PRINTK(x)
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#endif
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static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
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{
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__asm__ __volatile__("swap [%1], %0\n\t" :
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"=&r" (val), "=&r" (ptr) :
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"0" (val), "1" (ptr));
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return val;
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}
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static void smp_setup_percpu_timer(void);
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extern void cpu_probe(void);
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void __init smp4m_callin(void)
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{
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int cpuid = hard_smp_processor_id();
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local_flush_cache_all();
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local_flush_tlb_all();
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set_irq_udt(boot_cpu_id);
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/* Get our local ticker going. */
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smp_setup_percpu_timer();
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calibrate_delay();
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smp_store_cpu_info(cpuid);
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local_flush_cache_all();
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local_flush_tlb_all();
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/*
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* Unblock the master CPU _only_ when the scheduler state
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* of all secondary CPUs will be up-to-date, so after
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* the SMP initialization the master will be just allowed
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* to call the scheduler code.
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*/
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/* Allow master to continue. */
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swap((unsigned long *)&cpu_callin_map[cpuid], 1);
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local_flush_cache_all();
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local_flush_tlb_all();
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cpu_probe();
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/* Fix idle thread fields. */
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__asm__ __volatile__("ld [%0], %%g6\n\t"
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: : "r" (¤t_set[cpuid])
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: "memory" /* paranoid */);
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/* Attach to the address space of init_task. */
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atomic_inc(&init_mm.mm_count);
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current->active_mm = &init_mm;
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while(!smp_commenced)
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barrier();
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local_flush_cache_all();
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local_flush_tlb_all();
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local_irq_enable();
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}
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extern void init_IRQ(void);
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extern void cpu_panic(void);
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/*
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* Cycle through the processors asking the PROM to start each one.
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*/
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extern struct linux_prom_registers smp_penguin_ctable;
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extern unsigned long trapbase_cpu1[];
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extern unsigned long trapbase_cpu2[];
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extern unsigned long trapbase_cpu3[];
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void __init smp4m_boot_cpus(void)
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{
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int cpucount = 0;
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int i, mid;
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printk("Entering SMP Mode...\n");
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local_irq_enable();
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cpus_clear(cpu_present_map);
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for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++)
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cpu_set(mid, cpu_present_map);
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for(i=0; i < NR_CPUS; i++) {
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__cpu_number_map[i] = -1;
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__cpu_logical_map[i] = -1;
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}
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__cpu_number_map[boot_cpu_id] = 0;
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__cpu_logical_map[0] = boot_cpu_id;
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current_thread_info()->cpu = boot_cpu_id;
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smp_store_cpu_info(boot_cpu_id);
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set_irq_udt(boot_cpu_id);
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smp_setup_percpu_timer();
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local_flush_cache_all();
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if(cpu_find_by_instance(1, NULL, NULL))
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return; /* Not an MP box. */
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for(i = 0; i < NR_CPUS; i++) {
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if(i == boot_cpu_id)
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continue;
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if (cpu_isset(i, cpu_present_map)) {
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extern unsigned long sun4m_cpu_startup;
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unsigned long *entry = &sun4m_cpu_startup;
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struct task_struct *p;
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int timeout;
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/* Cook up an idler for this guy. */
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p = fork_idle(i);
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cpucount++;
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current_set[i] = p->thread_info;
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/* See trampoline.S for details... */
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entry += ((i-1) * 3);
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/*
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* Initialize the contexts table
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* Since the call to prom_startcpu() trashes the structure,
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* we need to re-initialize it for each cpu
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*/
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smp_penguin_ctable.which_io = 0;
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smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
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smp_penguin_ctable.reg_size = 0;
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/* whirrr, whirrr, whirrrrrrrrr... */
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printk("Starting CPU %d at %p\n", i, entry);
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local_flush_cache_all();
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prom_startcpu(cpu_data(i).prom_node,
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&smp_penguin_ctable, 0, (char *)entry);
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/* wheee... it's going... */
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for(timeout = 0; timeout < 10000; timeout++) {
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if(cpu_callin_map[i])
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break;
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udelay(200);
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}
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if(cpu_callin_map[i]) {
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/* Another "Red Snapper". */
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__cpu_number_map[i] = i;
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__cpu_logical_map[i] = i;
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} else {
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cpucount--;
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printk("Processor %d is stuck.\n", i);
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}
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}
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if(!(cpu_callin_map[i])) {
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cpu_clear(i, cpu_present_map);
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__cpu_number_map[i] = -1;
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}
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}
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local_flush_cache_all();
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if(cpucount == 0) {
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printk("Error: only one Processor found.\n");
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cpu_present_map = cpumask_of_cpu(smp_processor_id());
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} else {
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unsigned long bogosum = 0;
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for(i = 0; i < NR_CPUS; i++) {
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if (cpu_isset(i, cpu_present_map))
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bogosum += cpu_data(i).udelay_val;
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}
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printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
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cpucount + 1,
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bogosum/(500000/HZ),
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(bogosum/(5000/HZ))%100);
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smp_activated = 1;
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smp_num_cpus = cpucount + 1;
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}
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/* Free unneeded trap tables */
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if (!cpu_isset(i, cpu_present_map)) {
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ClearPageReserved(virt_to_page(trapbase_cpu1));
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set_page_count(virt_to_page(trapbase_cpu1), 1);
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free_page((unsigned long)trapbase_cpu1);
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totalram_pages++;
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num_physpages++;
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}
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if (!cpu_isset(2, cpu_present_map)) {
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ClearPageReserved(virt_to_page(trapbase_cpu2));
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set_page_count(virt_to_page(trapbase_cpu2), 1);
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free_page((unsigned long)trapbase_cpu2);
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totalram_pages++;
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num_physpages++;
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}
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if (!cpu_isset(3, cpu_present_map)) {
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ClearPageReserved(virt_to_page(trapbase_cpu3));
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set_page_count(virt_to_page(trapbase_cpu3), 1);
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free_page((unsigned long)trapbase_cpu3);
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totalram_pages++;
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num_physpages++;
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}
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/* Ok, they are spinning and ready to go. */
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smp_processors_ready = 1;
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}
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/* At each hardware IRQ, we get this called to forward IRQ reception
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* to the next processor. The caller must disable the IRQ level being
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* serviced globally so that there are no double interrupts received.
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*
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* XXX See sparc64 irq.c.
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*/
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void smp4m_irq_rotate(int cpu)
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{
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}
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/* Cross calls, in order to work efficiently and atomically do all
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* the message passing work themselves, only stopcpu and reschedule
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* messages come through here.
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*/
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void smp4m_message_pass(int target, int msg, unsigned long data, int wait)
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{
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static unsigned long smp_cpu_in_msg[NR_CPUS];
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cpumask_t mask;
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int me = smp_processor_id();
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int irq, i;
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if(msg == MSG_RESCHEDULE) {
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irq = IRQ_RESCHEDULE;
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if(smp_cpu_in_msg[me])
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return;
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} else if(msg == MSG_STOP_CPU) {
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irq = IRQ_STOP_CPU;
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} else {
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goto barf;
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}
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smp_cpu_in_msg[me]++;
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if(target == MSG_ALL_BUT_SELF || target == MSG_ALL) {
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mask = cpu_present_map;
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if(target == MSG_ALL_BUT_SELF)
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cpu_clear(me, mask);
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for(i = 0; i < 4; i++) {
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if (cpu_isset(i, mask))
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set_cpu_int(i, irq);
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}
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} else {
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set_cpu_int(target, irq);
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}
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smp_cpu_in_msg[me]--;
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return;
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barf:
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printk("Yeeee, trying to send SMP msg(%d) on cpu %d\n", msg, me);
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panic("Bogon SMP message pass.");
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}
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static struct smp_funcall {
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smpfunc_t func;
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unsigned long arg1;
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unsigned long arg2;
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unsigned long arg3;
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unsigned long arg4;
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unsigned long arg5;
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unsigned long processors_in[NR_CPUS]; /* Set when ipi entered. */
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unsigned long processors_out[NR_CPUS]; /* Set when ipi exited. */
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} ccall_info;
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static DEFINE_SPINLOCK(cross_call_lock);
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/* Cross calls must be serialized, at least currently. */
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void smp4m_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
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unsigned long arg3, unsigned long arg4, unsigned long arg5)
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{
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if(smp_processors_ready) {
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register int ncpus = smp_num_cpus;
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unsigned long flags;
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spin_lock_irqsave(&cross_call_lock, flags);
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/* Init function glue. */
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ccall_info.func = func;
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ccall_info.arg1 = arg1;
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ccall_info.arg2 = arg2;
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ccall_info.arg3 = arg3;
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ccall_info.arg4 = arg4;
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ccall_info.arg5 = arg5;
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/* Init receive/complete mapping, plus fire the IPI's off. */
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{
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cpumask_t mask = cpu_present_map;
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register int i;
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cpu_clear(smp_processor_id(), mask);
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for(i = 0; i < ncpus; i++) {
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if (cpu_isset(i, mask)) {
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ccall_info.processors_in[i] = 0;
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ccall_info.processors_out[i] = 0;
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set_cpu_int(i, IRQ_CROSS_CALL);
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} else {
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ccall_info.processors_in[i] = 1;
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ccall_info.processors_out[i] = 1;
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}
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}
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}
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{
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register int i;
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i = 0;
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do {
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while(!ccall_info.processors_in[i])
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barrier();
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} while(++i < ncpus);
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i = 0;
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do {
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while(!ccall_info.processors_out[i])
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barrier();
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} while(++i < ncpus);
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}
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spin_unlock_irqrestore(&cross_call_lock, flags);
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}
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}
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/* Running cross calls. */
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void smp4m_cross_call_irq(void)
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{
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int i = smp_processor_id();
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ccall_info.processors_in[i] = 1;
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ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
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ccall_info.arg4, ccall_info.arg5);
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ccall_info.processors_out[i] = 1;
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}
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void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
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{
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int cpu = smp_processor_id();
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clear_profile_irq(cpu);
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profile_tick(CPU_PROFILING, regs);
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if(!--prof_counter(cpu)) {
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int user = user_mode(regs);
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irq_enter();
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update_process_times(user);
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irq_exit();
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prof_counter(cpu) = prof_multiplier(cpu);
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}
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}
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extern unsigned int lvl14_resolution;
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static void __init smp_setup_percpu_timer(void)
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{
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int cpu = smp_processor_id();
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prof_counter(cpu) = prof_multiplier(cpu) = 1;
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load_profile_irq(cpu, lvl14_resolution);
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if(cpu == boot_cpu_id)
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enable_pil_irq(14);
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}
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void __init smp4m_blackbox_id(unsigned *addr)
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{
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int rd = *addr & 0x3e000000;
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int rs1 = rd >> 11;
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addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
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addr[1] = 0x8130200c | rd | rs1; /* srl reg, 0xc, reg */
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addr[2] = 0x80082003 | rd | rs1; /* and reg, 3, reg */
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}
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void __init smp4m_blackbox_current(unsigned *addr)
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{
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int rd = *addr & 0x3e000000;
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int rs1 = rd >> 11;
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addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
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addr[2] = 0x8130200a | rd | rs1; /* srl reg, 0xa, reg */
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addr[4] = 0x8008200c | rd | rs1; /* and reg, 3, reg */
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}
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void __init sun4m_init_smp(void)
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{
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BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
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BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
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BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
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BTFIXUPSET_CALL(smp_message_pass, smp4m_message_pass, BTFIXUPCALL_NORM);
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BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
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}
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