efc1bb8a6f
This patch adds core power management (suspend-to-RAM) support for DaVinci SoCs. The code depends on the the "deepsleep" feature to suspend the SoC and saves power by gating the input clock. The wakeup can be based on an external event as supported by the SoC. Assembly code (in sleep.S) is added to aid gating DDR2 clocks. Code doing this work should not be accessing DDR2. The assembly code is relocated to SRAM by the code in pm.c The support has been validated on DA850/OMAP-L138 only though the code is (hopefully) generic enough that other SoCs supporting deepsleep feature simply requires SoC specific code to start using this driver. Note that all the device drivers don't support suspend/resume still and are being worked on. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
54 lines
2 KiB
C
54 lines
2 KiB
C
/*
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* TI DaVinci platform support for power management.
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*
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* Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _MACH_DAVINCI_PM_H
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#define _MACH_DAVINCI_PM_H
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/*
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* Caution: Assembly code in sleep.S makes assumtion on the order
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* of the members of this structure.
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*/
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struct davinci_pm_config {
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void __iomem *ddr2_ctlr_base;
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void __iomem *ddrpsc_reg_base;
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int ddrpsc_num;
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void __iomem *ddrpll_reg_base;
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void __iomem *deepsleep_reg;
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void __iomem *cpupll_reg_base;
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/*
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* Note on SLEEPCOUNT:
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* The SLEEPCOUNT feature is mainly intended for cases in which
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* the internal oscillator is used. The internal oscillator is
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* fully disabled in deep sleep mode. When you exist deep sleep
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* mode, the oscillator will be turned on and will generate very
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* small oscillations which will not be detected by the deep sleep
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* counter. Eventually those oscillations will grow to an amplitude
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* large enough to start incrementing the deep sleep counter.
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* In this case recommendation from hardware engineers is that the
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* SLEEPCOUNT be set to 4096. This means that 4096 valid clock cycles
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* must be detected before the clock is passed to the rest of the
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* system.
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* In the case that the internal oscillator is not used and the
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* clock is generated externally, the SLEEPCOUNT value can be very
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* small since the clock input is assumed to be stable before SoC
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* is taken out of deepsleep mode. A value of 128 would be more than
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* adequate.
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*/
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int sleepcount;
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};
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extern unsigned int davinci_cpu_suspend_sz;
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extern void davinci_cpu_suspend(struct davinci_pm_config *);
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#endif
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