70ca608b2e
In MediaTek's IOMMU design, When a iommu translation fault occurs
(HW can NOT translate the destination address to a valid physical
address), the IOMMU HW output the dirty data into a special memory
to avoid corrupting the main memory, this is called "protect memory".
the register(0x114) for protect memory is a little different between
mt8173 and mt2712.
In the mt8173, bit[30:6] in the register represents [31:7] of the
physical address. In the 4GB mode, the register bit[31] should be 1.
While in the mt2712, the bits don't shift. bit[31:7] in the register
represents [31:7] in the physical address, and bit[1:0] in the
register represents bit[33:32] of the physical address if it has.
Fixes: e6dec92308 ("iommu/mediatek: Add mt2712 IOMMU support")
Reported-by: Honghui Zhang <honghui.zhang@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
89 lines
2 KiB
C
89 lines
2 KiB
C
/*
|
|
* Copyright (c) 2015-2016 MediaTek Inc.
|
|
* Author: Honghui Zhang <honghui.zhang@mediatek.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#ifndef _MTK_IOMMU_H_
|
|
#define _MTK_IOMMU_H_
|
|
|
|
#include <linux/clk.h>
|
|
#include <linux/component.h>
|
|
#include <linux/device.h>
|
|
#include <linux/io.h>
|
|
#include <linux/iommu.h>
|
|
#include <linux/list.h>
|
|
#include <linux/spinlock.h>
|
|
#include <soc/mediatek/smi.h>
|
|
|
|
#include "io-pgtable.h"
|
|
|
|
struct mtk_iommu_suspend_reg {
|
|
u32 standard_axi_mode;
|
|
u32 dcm_dis;
|
|
u32 ctrl_reg;
|
|
u32 int_control0;
|
|
u32 int_main_control;
|
|
u32 ivrp_paddr;
|
|
};
|
|
|
|
enum mtk_iommu_plat {
|
|
M4U_MT2701,
|
|
M4U_MT2712,
|
|
M4U_MT8173,
|
|
};
|
|
|
|
struct mtk_iommu_domain;
|
|
|
|
struct mtk_iommu_data {
|
|
void __iomem *base;
|
|
int irq;
|
|
struct device *dev;
|
|
struct clk *bclk;
|
|
phys_addr_t protect_base; /* protect memory base */
|
|
struct mtk_iommu_suspend_reg reg;
|
|
struct mtk_iommu_domain *m4u_dom;
|
|
struct iommu_group *m4u_group;
|
|
struct mtk_smi_iommu smi_imu; /* SMI larb iommu info */
|
|
bool enable_4GB;
|
|
bool tlb_flush_active;
|
|
|
|
struct iommu_device iommu;
|
|
enum mtk_iommu_plat m4u_plat;
|
|
|
|
struct list_head list;
|
|
};
|
|
|
|
static inline int compare_of(struct device *dev, void *data)
|
|
{
|
|
return dev->of_node == data;
|
|
}
|
|
|
|
static inline void release_of(struct device *dev, void *data)
|
|
{
|
|
of_node_put(data);
|
|
}
|
|
|
|
static inline int mtk_iommu_bind(struct device *dev)
|
|
{
|
|
struct mtk_iommu_data *data = dev_get_drvdata(dev);
|
|
|
|
return component_bind_all(dev, &data->smi_imu);
|
|
}
|
|
|
|
static inline void mtk_iommu_unbind(struct device *dev)
|
|
{
|
|
struct mtk_iommu_data *data = dev_get_drvdata(dev);
|
|
|
|
component_unbind_all(dev, &data->smi_imu);
|
|
}
|
|
|
|
#endif
|