bafe00cc92
From: Martin Schwidefsky <schwidefsky@de.ibm.com> __futex_atomic_op needs to do an atomic operation in the user address space, not the kernel address space. Add the missing sacf 256/sacf 0 to switch to the secondary mode before doing the compare-and-swap. In addition add another fixup for catch specification exceptions if the compare-and-swap address is not aligned. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
122 lines
3.2 KiB
C
122 lines
3.2 KiB
C
#ifndef _ASM_S390_FUTEX_H
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#define _ASM_S390_FUTEX_H
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#ifdef __KERNEL__
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#include <linux/futex.h>
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#include <asm/errno.h>
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#include <asm/uaccess.h>
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#ifndef __s390x__
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#define __futex_atomic_fixup \
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".section __ex_table,\"a\"\n" \
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" .align 4\n" \
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" .long 0b,4b,2b,4b,3b,4b\n" \
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".previous"
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#else /* __s390x__ */
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#define __futex_atomic_fixup \
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".section __ex_table,\"a\"\n" \
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" .align 8\n" \
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" .quad 0b,4b,2b,4b,3b,4b\n" \
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".previous"
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#endif /* __s390x__ */
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#define __futex_atomic_op(insn, ret, oldval, newval, uaddr, oparg) \
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asm volatile(" sacf 256\n" \
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"0: l %1,0(%6)\n" \
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"1: " insn \
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"2: cs %1,%2,0(%6)\n" \
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"3: jl 1b\n" \
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" lhi %0,0\n" \
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"4: sacf 0\n" \
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__futex_atomic_fixup \
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: "=d" (ret), "=&d" (oldval), "=&d" (newval), \
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"=m" (*uaddr) \
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: "0" (-EFAULT), "d" (oparg), "a" (uaddr), \
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"m" (*uaddr) : "cc" );
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static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
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{
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int op = (encoded_op >> 28) & 7;
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int cmp = (encoded_op >> 24) & 15;
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int oparg = (encoded_op << 8) >> 20;
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int cmparg = (encoded_op << 20) >> 20;
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int oldval = 0, newval, ret;
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if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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oparg = 1 << oparg;
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if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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inc_preempt_count();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op("lr %2,%5\n",
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ret, oldval, newval, uaddr, oparg);
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break;
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case FUTEX_OP_ADD:
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__futex_atomic_op("lr %2,%1\nar %2,%5\n",
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ret, oldval, newval, uaddr, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_atomic_op("lr %2,%1\nor %2,%5\n",
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ret, oldval, newval, uaddr, oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_atomic_op("lr %2,%1\nnr %2,%5\n",
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ret, oldval, newval, uaddr, oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_atomic_op("lr %2,%1\nxr %2,%5\n",
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ret, oldval, newval, uaddr, oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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dec_preempt_count();
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if (!ret) {
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switch (cmp) {
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case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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default: ret = -ENOSYS;
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}
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}
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return ret;
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}
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static inline int
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futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
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{
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int ret;
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if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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asm volatile(" cs %1,%4,0(%5)\n"
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"0: lr %0,%1\n"
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"1:\n"
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#ifndef __s390x__
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".section __ex_table,\"a\"\n"
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" .align 4\n"
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" .long 0b,1b\n"
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".previous"
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#else /* __s390x__ */
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".section __ex_table,\"a\"\n"
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" .align 8\n"
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" .quad 0b,1b\n"
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".previous"
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#endif /* __s390x__ */
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: "=d" (ret), "+d" (oldval), "=m" (*uaddr)
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: "0" (-EFAULT), "d" (newval), "a" (uaddr), "m" (*uaddr)
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: "cc", "memory" );
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return oldval;
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_S390_FUTEX_H */
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