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Linus Torvalds d25282d1c9 Merge branch 'modules-next' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux 
Pull module signing support from Rusty Russell:
 "module signing is the highlight, but it's an all-over David Howells frenzy..."

Hmm "Magrathea: Glacier signing key". Somebody has been reading too much HHGTTG.

* 'modules-next' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: (37 commits)
  X.509: Fix indefinite length element skip error handling
  X.509: Convert some printk calls to pr_devel
  asymmetric keys: fix printk format warning
  MODSIGN: Fix 32-bit overflow in X.509 certificate validity date checking
  MODSIGN: Make mrproper should remove generated files.
  MODSIGN: Use utf8 strings in signer's name in autogenerated X.509 certs
  MODSIGN: Use the same digest for the autogen key sig as for the module sig
  MODSIGN: Sign modules during the build process
  MODSIGN: Provide a script for generating a key ID from an X.509 cert
  MODSIGN: Implement module signature checking
  MODSIGN: Provide module signing public keys to the kernel
  MODSIGN: Automatically generate module signing keys if missing
  MODSIGN: Provide Kconfig options
  MODSIGN: Provide gitignore and make clean rules for extra files
  MODSIGN: Add FIPS policy
  module: signature checking hook
  X.509: Add a crypto key parser for binary (DER) X.509 certificates
  MPILIB: Provide a function to read raw data into an MPI
  X.509: Add an ASN.1 decoder
  X.509: Add simple ASN.1 grammar compiler
  ...
2012-10-14 13:39:34 -07:00
..
boot Kbuild: Use dtc's -d (dependency) option 2012-01-15 00:04:35 +01:00
configs OpenRISC: Build infrastructure 2011-07-22 18:46:30 +02:00
include UAPI Disintegration 2012-10-09 2012-10-13 07:38:37 +02:00
kernel OpenRISC updates for 3.7 2012-10-13 11:25:41 +09:00
lib openrisc: delay: fix handling of counter overflow 2012-09-01 16:36:14 +02:00
mm readahead: fault retry breaks mmap file read random detection 2012-10-09 16:22:47 +09:00
Kconfig Make most arch asm/module.h files use asm-generic/module.h 2012-09-28 14:31:03 +09:30
Makefile openrisc: Use generic init_task 2012-05-05 13:00:24 +02:00
README.openrisc OpenRISC: Miscellaneous 2011-07-22 18:46:41 +02:00
TODO.openrisc OpenRISC: Miscellaneous 2011-07-22 18:46:41 +02:00

README.openrisc 

OpenRISC Linux
==============

This is a port of Linux to the OpenRISC class of microprocessors; the initial
target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).

For information about OpenRISC processors and ongoing development:

	website		http://openrisc.net

For more information about Linux on OpenRISC, please contact South Pole AB.

	email:		info@southpole.se

	website:	http://southpole.se
			http://southpoleconsulting.com

---------------------------------------------------------------------

Build instructions for OpenRISC toolchain and Linux
===================================================

In order to build and run Linux for OpenRISC, you'll need at least a basic
toolchain and, perhaps, the architectural simulator.  Steps to get these bits
in place are outlined here.

1)  The toolchain can be obtained from openrisc.net.  Instructions for building
a toolchain can be found at:

http://openrisc.net/toolchain-build.html

2) or1ksim (optional)

or1ksim is the architectural simulator which will allow you to actually run
your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.

	git clone git://openrisc.net/jonas/or1ksim-svn

	cd or1ksim
	./configure --prefix=$OPENRISC_PREFIX
	make
	make install

3)  Linux kernel

Build the kernel as usual

	make ARCH=openrisc defconfig
	make ARCH=openrisc

4)  Run in architectural simulator

Grab the or1ksim platform configuration file (from the or1ksim source) and
together with your freshly built vmlinux, run your kernel with the following
incantation:

	sim -f arch/openrisc/or1ksim.cfg vmlinux

---------------------------------------------------------------------

Terminology
===========

In the code, the following particles are used on symbols to limit the scope
to more or less specific processor implementations:

openrisc: the OpenRISC class of processors
or1k:     the OpenRISC 1000 family of processors
or1200:   the OpenRISC 1200 processor

---------------------------------------------------------------------

History
========

18. 11. 2003	Matjaz Breskvar (phoenix@bsemi.com)
	initial port of linux to OpenRISC/or32 architecture.
        all the core stuff is implemented and seams usable.

08. 12. 2003	Matjaz Breskvar (phoenix@bsemi.com)
	complete change of TLB miss handling.
	rewrite of exceptions handling.
	fully functional sash-3.6 in default initrd.
	a much improved version with changes all around.

10. 04. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	alot of bugfixes all over.
	ethernet support, functional http and telnet servers.
	running many standard linux apps.

26. 06. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	port to 2.6.x

30. 11. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	lots of bugfixes and enhancments.
	added opencores framebuffer driver.

09. 10. 2010    Jonas Bonn (jonas@southpole.se)
	major rewrite to bring up to par with upstream Linux 2.6.36