30a564be9d
After programming the HPET, we do a readback as a workaround for ATI/SBx00 chipsets as a synchronization. Unfortunately this triggers an erratum in newer ICH chipsets (ICH9+) where reading the comparator immediately after the write returns the old value. Furthermore, as always, I/O reads are bad for performance. Therefore, restrict the readback to the chipsets that need it, or, for debugging purposes, when we are running with hpet=verbose. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Venkatesh Pallipadi <venki@google.com> LKML-Reference: <20100225185348.GA9674@linux-os.sc.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
117 lines
3.3 KiB
C
117 lines
3.3 KiB
C
#ifndef _ASM_X86_HPET_H
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#define _ASM_X86_HPET_H
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#include <linux/msi.h>
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#ifdef CONFIG_HPET_TIMER
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#define HPET_MMAP_SIZE 1024
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#define HPET_ID 0x000
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#define HPET_PERIOD 0x004
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#define HPET_CFG 0x010
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#define HPET_STATUS 0x020
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#define HPET_COUNTER 0x0f0
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#define HPET_Tn_CFG(n) (0x100 + 0x20 * n)
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#define HPET_Tn_CMP(n) (0x108 + 0x20 * n)
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#define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n)
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#define HPET_T0_CFG 0x100
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#define HPET_T0_CMP 0x108
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#define HPET_T0_ROUTE 0x110
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#define HPET_T1_CFG 0x120
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#define HPET_T1_CMP 0x128
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#define HPET_T1_ROUTE 0x130
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#define HPET_T2_CFG 0x140
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#define HPET_T2_CMP 0x148
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#define HPET_T2_ROUTE 0x150
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#define HPET_ID_REV 0x000000ff
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#define HPET_ID_NUMBER 0x00001f00
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#define HPET_ID_64BIT 0x00002000
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#define HPET_ID_LEGSUP 0x00008000
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#define HPET_ID_VENDOR 0xffff0000
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#define HPET_ID_NUMBER_SHIFT 8
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#define HPET_ID_VENDOR_SHIFT 16
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#define HPET_ID_VENDOR_8086 0x8086
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#define HPET_CFG_ENABLE 0x001
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#define HPET_CFG_LEGACY 0x002
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#define HPET_LEGACY_8254 2
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#define HPET_LEGACY_RTC 8
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#define HPET_TN_LEVEL 0x0002
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#define HPET_TN_ENABLE 0x0004
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#define HPET_TN_PERIODIC 0x0008
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#define HPET_TN_PERIODIC_CAP 0x0010
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#define HPET_TN_64BIT_CAP 0x0020
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#define HPET_TN_SETVAL 0x0040
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#define HPET_TN_32BIT 0x0100
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#define HPET_TN_ROUTE 0x3e00
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#define HPET_TN_FSB 0x4000
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#define HPET_TN_FSB_CAP 0x8000
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#define HPET_TN_ROUTE_SHIFT 9
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/* Max HPET Period is 10^8 femto sec as in HPET spec */
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#define HPET_MAX_PERIOD 100000000UL
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/*
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* Min HPET period is 10^5 femto sec just for safety. If it is less than this,
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* then 32 bit HPET counter wrapsaround in less than 0.5 sec.
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*/
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#define HPET_MIN_PERIOD 100000UL
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/* hpet memory map physical address */
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extern unsigned long hpet_address;
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extern unsigned long force_hpet_address;
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extern u8 hpet_blockid;
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extern int hpet_force_user;
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extern u8 hpet_msi_disable;
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extern u8 hpet_readback_cmp;
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extern int is_hpet_enabled(void);
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extern int hpet_enable(void);
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extern void hpet_disable(void);
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extern unsigned int hpet_readl(unsigned int a);
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extern void force_hpet_resume(void);
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extern void hpet_msi_unmask(unsigned int irq);
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extern void hpet_msi_mask(unsigned int irq);
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extern void hpet_msi_write(unsigned int irq, struct msi_msg *msg);
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extern void hpet_msi_read(unsigned int irq, struct msi_msg *msg);
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#ifdef CONFIG_PCI_MSI
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extern int arch_setup_hpet_msi(unsigned int irq, unsigned int id);
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#else
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static inline int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
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{
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return -EINVAL;
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}
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#endif
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#ifdef CONFIG_HPET_EMULATE_RTC
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#include <linux/interrupt.h>
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typedef irqreturn_t (*rtc_irq_handler)(int interrupt, void *cookie);
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extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
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extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
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extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
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unsigned char sec);
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extern int hpet_set_periodic_freq(unsigned long freq);
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extern int hpet_rtc_dropped_irq(void);
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extern int hpet_rtc_timer_init(void);
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extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
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extern int hpet_register_irq_handler(rtc_irq_handler handler);
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extern void hpet_unregister_irq_handler(rtc_irq_handler handler);
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#endif /* CONFIG_HPET_EMULATE_RTC */
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#else /* CONFIG_HPET_TIMER */
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static inline int hpet_enable(void) { return 0; }
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static inline int is_hpet_enabled(void) { return 0; }
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#define hpet_readl(a) 0
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#endif
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#endif /* _ASM_X86_HPET_H */
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