5e6e3a92b9
This driver adds WiFi support for Marvell 802.11n based chipsets with SDIO interface. Currently only SD8787 is supported. More chipsets will be supported later. drivers/net/wireless/mwifiex/ Signed-off-by: Nishant Sarmukadam <nishants@marvell.com> Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Kiran Divekar <dkiran@marvell.com> Signed-off-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: Yogesh Ashok Powar <yogeshp@marvell.com> Signed-off-by: Marc Yang <yangyang@marvell.com> Signed-off-by: Ramesh Radhakrishnan <rramesh@marvell.com> Signed-off-by: Frank Huang <frankh@marvell.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
177 lines
4.5 KiB
C
177 lines
4.5 KiB
C
/*
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* Marvell Wireless LAN device driver: generic data structures and APIs
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*
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* Copyright (C) 2011, Marvell International Ltd.
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*
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* This software file (the "File") is distributed by Marvell International
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* Ltd. under the terms of the GNU General Public License Version 2, June 1991
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* (the "License"). You may use, redistribute and/or modify this File in
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* accordance with the terms and conditions of the License, a copy of which
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* is available by writing to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
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* worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
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*
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* THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
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* ARE EXPRESSLY DISCLAIMED. The License provides additional details about
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* this warranty disclaimer.
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*/
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#ifndef _MWIFIEX_DECL_H_
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#define _MWIFIEX_DECL_H_
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#undef pr_fmt
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/wait.h>
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#include <linux/timer.h>
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#include <linux/ieee80211.h>
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#define MWIFIEX_MAX_BSS_NUM (1)
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#define MWIFIEX_MIN_DATA_HEADER_LEN 32 /* (sizeof(mwifiex_txpd)) */
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#define MWIFIEX_MAX_TX_BASTREAM_SUPPORTED 2
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#define MWIFIEX_MAX_RX_BASTREAM_SUPPORTED 16
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#define MWIFIEX_AMPDU_DEF_TXWINSIZE 32
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#define MWIFIEX_AMPDU_DEF_RXWINSIZE 16
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#define MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT 0xffff
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#define MWIFIEX_RATE_INDEX_HRDSSS0 0
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#define MWIFIEX_RATE_INDEX_HRDSSS3 3
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#define MWIFIEX_RATE_INDEX_OFDM0 4
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#define MWIFIEX_RATE_INDEX_OFDM7 11
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#define MWIFIEX_RATE_INDEX_MCS0 12
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#define MWIFIEX_RATE_BITMAP_OFDM0 16
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#define MWIFIEX_RATE_BITMAP_OFDM7 23
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#define MWIFIEX_RATE_BITMAP_MCS0 32
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#define MWIFIEX_RATE_BITMAP_MCS127 159
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#define MWIFIEX_RX_DATA_BUF_SIZE (4 * 1024)
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#define MWIFIEX_RX_CMD_BUF_SIZE (2 * 1024)
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#define MWIFIEX_RTS_MIN_VALUE (0)
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#define MWIFIEX_RTS_MAX_VALUE (2347)
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#define MWIFIEX_FRAG_MIN_VALUE (256)
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#define MWIFIEX_FRAG_MAX_VALUE (2346)
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#define MWIFIEX_SDIO_BLOCK_SIZE 256
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#define MWIFIEX_BUF_FLAG_REQUEUED_PKT BIT(0)
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enum mwifiex_error_code {
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MWIFIEX_ERROR_NO_ERROR = 0,
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MWIFIEX_ERROR_FW_NOT_READY = 0x00000001,
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MWIFIEX_ERROR_FW_BUSY,
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MWIFIEX_ERROR_FW_CMDRESP,
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MWIFIEX_ERROR_PKT_SIZE_INVALID = 0x80000001,
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MWIFIEX_ERROR_PKT_TIMEOUT,
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MWIFIEX_ERROR_CMD_INVALID,
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MWIFIEX_ERROR_CMD_TIMEOUT,
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MWIFIEX_ERROR_CMD_DNLD_FAIL,
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MWIFIEX_ERROR_CMD_CANCEL,
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MWIFIEX_ERROR_CMD_RESP_FAIL,
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MWIFIEX_ERROR_ASSOC_FAIL,
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MWIFIEX_ERROR_EVENT_UNKNOWN,
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MWIFIEX_ERROR_INVALID_PARAMETER,
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};
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enum mwifiex_bss_type {
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MWIFIEX_BSS_TYPE_STA = 0,
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MWIFIEX_BSS_TYPE_UAP = 1,
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MWIFIEX_BSS_TYPE_ANY = 0xff,
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};
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enum mwifiex_bss_role {
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MWIFIEX_BSS_ROLE_STA = 0,
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MWIFIEX_BSS_ROLE_UAP = 1,
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MWIFIEX_BSS_ROLE_ANY = 0xff,
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};
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#define BSS_ROLE_BIT_MASK BIT(0)
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#define GET_BSS_ROLE(priv) ((priv)->bss_role & BSS_ROLE_BIT_MASK)
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enum mwifiex_data_frame_type {
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MWIFIEX_DATA_FRAME_TYPE_ETH_II = 0,
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MWIFIEX_DATA_FRAME_TYPE_802_11,
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};
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struct mwifiex_fw_image {
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u8 *helper_buf;
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u32 helper_len;
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u8 *fw_buf;
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u32 fw_len;
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};
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struct mwifiex_802_11_ssid {
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u32 ssid_len;
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u8 ssid[IEEE80211_MAX_SSID_LEN];
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};
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struct mwifiex_wait_queue {
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u32 bss_index;
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wait_queue_head_t *wait;
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u16 *condition;
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u32 start_time;
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int status;
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u32 enabled;
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};
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struct mwifiex_rxinfo {
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u8 bss_index;
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struct sk_buff *parent;
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u8 use_count;
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};
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struct mwifiex_txinfo {
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u32 status_code;
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u8 flags;
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u8 bss_index;
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};
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struct mwifiex_bss_attr {
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u32 bss_type;
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u32 frame_type;
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u32 active;
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u32 bss_priority;
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u32 bss_num;
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};
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enum mwifiex_cmd_result_e {
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MWIFIEX_CMD_RESULT_SUCCESS = 0,
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MWIFIEX_CMD_RESULT_FAILURE = 1,
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MWIFIEX_CMD_RESULT_TIMEOUT = 2,
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MWIFIEX_CMD_RESULT_INVALID_DATA = 3
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} __packed;
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enum mwifiex_wmm_ac_e {
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WMM_AC_BK,
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WMM_AC_BE,
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WMM_AC_VI,
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WMM_AC_VO
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} __packed;
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enum mwifiex_wmm_queue_config_action_e {
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MWIFIEX_WMM_QUEUE_CONFIG_ACTION_GET = 0,
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MWIFIEX_WMM_QUEUE_CONFIG_ACTION_SET = 1,
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MWIFIEX_WMM_QUEUE_CONFIG_ACTION_DEFAULT = 2,
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MWIFIEX_WMM_QUEUE_CONFIG_ACTION_MAX
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} __packed;
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enum mwifiex_wmm_queue_stats_action_e {
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MWIFIEX_WMM_STATS_ACTION_START = 0,
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MWIFIEX_WMM_STATS_ACTION_STOP = 1,
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MWIFIEX_WMM_STATS_ACTION_GET_CLR = 2,
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MWIFIEX_WMM_STATS_ACTION_SET_CFG = 3, /* Not currently used */
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MWIFIEX_WMM_STATS_ACTION_GET_CFG = 4, /* Not currently used */
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MWIFIEX_WMM_STATS_ACTION_MAX
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} __packed;
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struct mwifiex_device {
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struct mwifiex_bss_attr bss_attr[MWIFIEX_MAX_BSS_NUM];
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};
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#endif /* !_MWIFIEX_DECL_H_ */
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