5a6704454a
BCM6338 and BCM6348 have a message control register width of 8 bits, instead of 16-bits like what the SPI driver assumes right now. Also the SPI message type shift value of 14 is actually 6 for these SoCs. This resulted in transmit FIFO corruption because we were writing 16-bits to an 8-bits wide register, thus spanning on the first byte of the transmit FIFO, which had already been filed in bcm63xx_spi_fill_txrx_fifo(). Fix this by passing the message control register width and message type shift through platform data back to the SPI driver so that it can use it properly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Cc: jonas.gorski@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/3983/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
123 lines
2.9 KiB
C
123 lines
2.9 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
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* Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/export.h>
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <bcm63xx_cpu.h>
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#include <bcm63xx_dev_spi.h>
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#include <bcm63xx_regs.h>
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#ifdef BCMCPU_RUNTIME_DETECT
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/*
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* register offsets
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*/
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static const unsigned long bcm6338_regs_spi[] = {
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__GEN_SPI_REGS_TABLE(6338)
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};
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static const unsigned long bcm6348_regs_spi[] = {
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__GEN_SPI_REGS_TABLE(6348)
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};
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static const unsigned long bcm6358_regs_spi[] = {
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__GEN_SPI_REGS_TABLE(6358)
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};
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static const unsigned long bcm6368_regs_spi[] = {
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__GEN_SPI_REGS_TABLE(6368)
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};
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const unsigned long *bcm63xx_regs_spi;
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EXPORT_SYMBOL(bcm63xx_regs_spi);
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static __init void bcm63xx_spi_regs_init(void)
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{
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if (BCMCPU_IS_6338())
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bcm63xx_regs_spi = bcm6338_regs_spi;
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if (BCMCPU_IS_6348())
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bcm63xx_regs_spi = bcm6348_regs_spi;
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if (BCMCPU_IS_6358())
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bcm63xx_regs_spi = bcm6358_regs_spi;
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if (BCMCPU_IS_6368())
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bcm63xx_regs_spi = bcm6368_regs_spi;
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}
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#else
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static __init void bcm63xx_spi_regs_init(void) { }
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#endif
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static struct resource spi_resources[] = {
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{
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.start = -1, /* filled at runtime */
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.end = -1, /* filled at runtime */
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.flags = IORESOURCE_MEM,
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},
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{
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.start = -1, /* filled at runtime */
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct bcm63xx_spi_pdata spi_pdata = {
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.bus_num = 0,
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.num_chipselect = 8,
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};
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static struct platform_device bcm63xx_spi_device = {
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.name = "bcm63xx-spi",
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.id = -1,
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.num_resources = ARRAY_SIZE(spi_resources),
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.resource = spi_resources,
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.dev = {
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.platform_data = &spi_pdata,
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},
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};
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int __init bcm63xx_spi_register(void)
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{
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struct clk *periph_clk;
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if (BCMCPU_IS_6328() || BCMCPU_IS_6345())
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return -ENODEV;
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periph_clk = clk_get(NULL, "periph");
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if (IS_ERR(periph_clk)) {
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pr_err("unable to get periph clock\n");
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return -ENODEV;
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}
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/* Set bus frequency */
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spi_pdata.speed_hz = clk_get_rate(periph_clk);
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spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
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spi_resources[0].end = spi_resources[0].start;
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spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
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if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
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spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;
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spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;
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spi_pdata.msg_type_shift = SPI_6338_MSG_TYPE_SHIFT;
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spi_pdata.msg_ctl_width = SPI_6338_MSG_CTL_WIDTH;
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}
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if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
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spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
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spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
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spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
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spi_pdata.msg_ctl_width = SPI_6358_MSG_CTL_WIDTH;
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}
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bcm63xx_spi_regs_init();
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return platform_device_register(&bcm63xx_spi_device);
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}
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