bdb2dfb237
After calibrating radio you can find few PHY writes in MMIO dumps: phy_read(0x0009) -> 0x0000 phy_write(0x01ce) <- 0x03dd phy_write(0x01cf) <- 0x03d9 phy_write(0x01d0) <- 0x03d5 phy_write(0x01d1) <- 0x0424 phy_write(0x01d2) <- 0x0429 phy_write(0x01d3) <- 0x042d By comparing to N-PHY code we found out that they are PHY tables for channel switching plus band info read at the beginning. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
#ifndef B43_PHY_HT_H_
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#define B43_PHY_HT_H_
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#include "phy_common.h"
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#define B43_PHY_HT_BANDCTL 0x009 /* Band control */
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#define B43_PHY_HT_TABLE_ADDR 0x072 /* Table address */
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#define B43_PHY_HT_TABLE_DATALO 0x073 /* Table data low */
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#define B43_PHY_HT_TABLE_DATAHI 0x074 /* Table data high */
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#define B43_PHY_HT_BW1 0x1CE
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#define B43_PHY_HT_BW2 0x1CF
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#define B43_PHY_HT_BW3 0x1D0
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#define B43_PHY_HT_BW4 0x1D1
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#define B43_PHY_HT_BW5 0x1D2
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#define B43_PHY_HT_BW6 0x1D3
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#define B43_PHY_HT_RF_CTL1 B43_PHY_EXTG(0x010)
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#define B43_PHY_HT_AFE_CTL1 B43_PHY_EXTG(0x110)
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#define B43_PHY_HT_AFE_CTL2 B43_PHY_EXTG(0x111)
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#define B43_PHY_HT_AFE_CTL3 B43_PHY_EXTG(0x114)
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#define B43_PHY_HT_AFE_CTL4 B43_PHY_EXTG(0x115)
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#define B43_PHY_HT_AFE_CTL5 B43_PHY_EXTG(0x118)
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#define B43_PHY_HT_AFE_CTL6 B43_PHY_EXTG(0x119)
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/* Values for PHY registers used on channel switching */
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struct b43_phy_ht_channeltab_e_phy {
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u16 bw1;
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u16 bw2;
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u16 bw3;
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u16 bw4;
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u16 bw5;
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u16 bw6;
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};
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struct b43_phy_ht {
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};
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struct b43_phy_operations;
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extern const struct b43_phy_operations b43_phyops_ht;
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#endif /* B43_PHY_HT_H_ */
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