a1d0d98daf
Add a platform for the Wire Speed Processor, based on the PPC A2. This includes code for the ICS & OPB interrupt controllers, as well as a SCOM backend, and SCOM based cpu bringup. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Jack Miller <jack@codezen.org> Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
28 lines
458 B
Text
28 lines
458 B
Text
config PPC_WSP
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bool
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default n
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menu "WSP platform selection"
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depends on PPC_BOOK3E_64
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config PPC_PSR2
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bool "PSR-2 platform"
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select PPC_A2
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select GENERIC_TBSYNC
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select PPC_SCOM
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select EPAPR_BOOT
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select PPC_WSP
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select PPC_XICS
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select PPC_ICP_NATIVE
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default y
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endmenu
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config PPC_A2_DD2
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bool "Support for DD2 based A2/WSP systems"
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depends on PPC_A2
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config WORKAROUND_ERRATUM_463
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depends on PPC_A2_DD2
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bool "Workaround erratum 463"
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default y
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