da41119af7
We were forcing SIGFPE on to a user program for no good reason. Use send_sig_info() instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
288 lines
6.6 KiB
C
288 lines
6.6 KiB
C
/*
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* linux/arch/arm/vfp/vfpmodule.c
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*
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* Copyright (C) 2004 ARM Limited.
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* Written by Deep Blue Solutions Limited.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <asm/vfp.h>
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#include "vfpinstr.h"
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#include "vfp.h"
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/*
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* Our undef handlers (in entry.S)
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*/
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void vfp_testing_entry(void);
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void vfp_support_entry(void);
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void (*vfp_vector)(void) = vfp_testing_entry;
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union vfp_state *last_VFP_context;
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/*
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* Dual-use variable.
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* Used in startup: set to non-zero if VFP checks fail
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* After startup, holds VFP architecture
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*/
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unsigned int VFP_arch;
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/*
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* Per-thread VFP initialisation.
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*/
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void vfp_flush_thread(union vfp_state *vfp)
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{
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memset(vfp, 0, sizeof(union vfp_state));
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vfp->hard.fpexc = FPEXC_ENABLE;
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vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
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/*
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* Disable VFP to ensure we initialise it first.
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*/
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fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE);
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/*
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* Ensure we don't try to overwrite our newly initialised
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* state information on the first fault.
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*/
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if (last_VFP_context == vfp)
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last_VFP_context = NULL;
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}
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/*
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* Per-thread VFP cleanup.
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*/
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void vfp_release_thread(union vfp_state *vfp)
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{
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if (last_VFP_context == vfp)
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last_VFP_context = NULL;
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}
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/*
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* Raise a SIGFPE for the current process.
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* sicode describes the signal being raised.
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*/
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void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
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{
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siginfo_t info;
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memset(&info, 0, sizeof(info));
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info.si_signo = SIGFPE;
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info.si_code = sicode;
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info.si_addr = (void *)(instruction_pointer(regs) - 4);
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/*
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* This is the same as NWFPE, because it's not clear what
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* this is used for
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*/
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current->thread.error_code = 0;
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current->thread.trap_no = 6;
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send_sig_info(SIGFPE, &info, current);
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}
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static void vfp_panic(char *reason)
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{
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int i;
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printk(KERN_ERR "VFP: Error: %s\n", reason);
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printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
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fmrx(FPEXC), fmrx(FPSCR), fmrx(FPINST));
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for (i = 0; i < 32; i += 2)
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printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
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i, vfp_get_float(i), i+1, vfp_get_float(i+1));
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}
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/*
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* Process bitmask of exception conditions.
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*/
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static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
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{
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int si_code = 0;
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pr_debug("VFP: raising exceptions %08x\n", exceptions);
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if (exceptions == (u32)-1) {
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vfp_panic("unhandled bounce");
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vfp_raise_sigfpe(0, regs);
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return;
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}
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/*
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* If any of the status flags are set, update the FPSCR.
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* Comparison instructions always return at least one of
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* these flags set.
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*/
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if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
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fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
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fpscr |= exceptions;
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fmxr(FPSCR, fpscr);
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#define RAISE(stat,en,sig) \
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if (exceptions & stat && fpscr & en) \
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si_code = sig;
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/*
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* These are arranged in priority order, least to highest.
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*/
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RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES);
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RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND);
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RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
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RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
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if (si_code)
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vfp_raise_sigfpe(si_code, regs);
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}
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/*
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* Emulate a VFP instruction.
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*/
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static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
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{
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u32 exceptions = (u32)-1;
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pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr);
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if (INST_CPRTDO(inst)) {
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if (!INST_CPRT(inst)) {
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/*
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* CPDO
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*/
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if (vfp_single(inst)) {
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exceptions = vfp_single_cpdo(inst, fpscr);
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} else {
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exceptions = vfp_double_cpdo(inst, fpscr);
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}
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} else {
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/*
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* A CPRT instruction can not appear in FPINST2, nor
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* can it cause an exception. Therefore, we do not
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* have to emulate it.
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*/
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}
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} else {
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/*
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* A CPDT instruction can not appear in FPINST2, nor can
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* it cause an exception. Therefore, we do not have to
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* emulate it.
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*/
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}
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return exceptions;
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}
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/*
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* Package up a bounce condition.
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*/
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void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
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{
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u32 fpscr, orig_fpscr, exceptions, inst;
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pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
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/*
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* Enable access to the VFP so we can handle the bounce.
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*/
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fmxr(FPEXC, fpexc & ~(FPEXC_EXCEPTION|FPEXC_INV|FPEXC_UFC|FPEXC_IOC));
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orig_fpscr = fpscr = fmrx(FPSCR);
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/*
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* If we are running with inexact exceptions enabled, we need to
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* emulate the trigger instruction. Note that as we're emulating
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* the trigger instruction, we need to increment PC.
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*/
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if (fpscr & FPSCR_IXE) {
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regs->ARM_pc += 4;
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goto emulate;
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}
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barrier();
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/*
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* Modify fpscr to indicate the number of iterations remaining
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*/
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if (fpexc & FPEXC_EXCEPTION) {
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u32 len;
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len = fpexc + (1 << FPEXC_LENGTH_BIT);
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fpscr &= ~FPSCR_LENGTH_MASK;
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fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT);
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}
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/*
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* Handle the first FP instruction. We used to take note of the
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* FPEXC bounce reason, but this appears to be unreliable.
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* Emulate the bounced instruction instead.
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*/
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inst = fmrx(FPINST);
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exceptions = vfp_emulate_instruction(inst, fpscr, regs);
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if (exceptions)
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vfp_raise_exceptions(exceptions, inst, orig_fpscr, regs);
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/*
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* If there isn't a second FP instruction, exit now.
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*/
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if (!(fpexc & FPEXC_FPV2))
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return;
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/*
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* The barrier() here prevents fpinst2 being read
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* before the condition above.
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*/
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barrier();
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trigger = fmrx(FPINST2);
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fpscr = fmrx(FPSCR);
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emulate:
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exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
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if (exceptions)
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vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
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}
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/*
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* VFP support code initialisation.
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*/
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static int __init vfp_init(void)
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{
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unsigned int vfpsid;
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/*
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* First check that there is a VFP that we can use.
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* The handler is already setup to just log calls, so
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* we just need to read the VFPSID register.
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*/
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vfpsid = fmrx(FPSID);
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printk(KERN_INFO "VFP support v0.3: ");
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if (VFP_arch) {
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printk("not present\n");
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} else if (vfpsid & FPSID_NODOUBLE) {
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printk("no double precision support\n");
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} else {
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VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
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printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
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(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
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(vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT,
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(vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
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(vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
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(vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
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vfp_vector = vfp_support_entry;
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}
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return 0;
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}
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late_initcall(vfp_init);
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