1112b36094
The purpose of this series is to add the SMP support for the Armada XP SoCs. Beside the SMP support itself brought by the last 3 commits, this series also adds the support for the coherency fabric unit and the power management service unit. The coherency fabric is responsible for ensuring hardware coherency between all CPUs and between CPUs and I/O masters. This unit is also available for Armada 370 and will be used in an incoming patch set for hardware I/O cache coherency. The power management service unit is responsible for powering down and waking up CPUs and other SOC units. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iEYEABECAAYFAlCs+5oACgkQCwYYjhRyO9UywACfVp3WPDHLxE8ypew3AWoTyxe3 JcMAoIjojnjWCd44cqDJ4uEpvi6KNquE =BR8m -----END PGP SIGNATURE----- Merge tag 'marvell-armadaxp-smp-for-3.8' of github.com:MISL-EBU-System-SW/mainline-public into mevbu-dt-additions SMP support for Armada XP The purpose of this series is to add the SMP support for the Armada XP SoCs. Beside the SMP support itself brought by the last 3 commits, this series also adds the support for the coherency fabric unit and the power management service unit. The coherency fabric is responsible for ensuring hardware coherency between all CPUs and between CPUs and I/O masters. This unit is also available for Armada 370 and will be used in an incoming patch set for hardware I/O cache coherency. The power management service unit is responsible for powering down and waking up CPUs and other SOC units. Conflicts: arch/arm/mach-mvebu/armada-370-xp.c
84 lines
2.2 KiB
C
84 lines
2.2 KiB
C
/*
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* Device Tree support for Armada 370 and XP platforms.
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*
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* Copyright (C) 2012 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/of_platform.h>
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#include <linux/io.h>
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#include <linux/time-armada-370-xp.h>
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#include <linux/clk/mvebu.h>
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#include <linux/dma-mapping.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include "armada-370-xp.h"
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#include "common.h"
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#include "coherency.h"
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static struct map_desc armada_370_xp_io_desc[] __initdata = {
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{
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.virtual = (unsigned long) ARMADA_370_XP_REGS_VIRT_BASE,
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.pfn = __phys_to_pfn(ARMADA_370_XP_REGS_PHYS_BASE),
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.length = ARMADA_370_XP_REGS_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init armada_370_xp_map_io(void)
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{
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iotable_init(armada_370_xp_io_desc, ARRAY_SIZE(armada_370_xp_io_desc));
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}
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void __init armada_370_xp_timer_and_clk_init(void)
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{
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mvebu_clocks_init();
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armada_370_xp_timer_init();
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}
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void __init armada_370_xp_init_early(void)
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{
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/*
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* Some Armada 370/XP devices allocate their coherent buffers
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* from atomic context. Increase size of atomic coherent pool
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* to make sure such the allocations won't fail.
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*/
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init_dma_coherent_pool_size(SZ_1M);
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}
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struct sys_timer armada_370_xp_timer = {
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.init = armada_370_xp_timer_and_clk_init,
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};
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static void __init armada_370_xp_dt_init(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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coherency_init();
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}
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static const char * const armada_370_xp_dt_compat[] = {
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"marvell,armada-370-xp",
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NULL,
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};
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DT_MACHINE_START(ARMADA_XP_DT, "Marvell Armada 370/XP (Device Tree)")
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.smp = smp_ops(armada_xp_smp_ops),
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.init_machine = armada_370_xp_dt_init,
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.map_io = armada_370_xp_map_io,
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.init_early = armada_370_xp_init_early,
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.init_irq = armada_370_xp_init_irq,
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.handle_irq = armada_370_xp_handle_irq,
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.timer = &armada_370_xp_timer,
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.restart = mvebu_restart,
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.dt_compat = armada_370_xp_dt_compat,
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MACHINE_END
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