71a8986d7e
Currently we hash the MPIDR of the CPU being suspended to determine which entry in the sleep_save_sp array to use. In some situations, such as when we want to resume on another physical CPU, the MPIDR of another CPU should be used instead. So let's use the value of cpu_logical_map(smp_processor_id()) in place of the MPIDR in the suspend path. This will result in the same index being used as with the previous code unless the caller has modified cpu_logical_map() beforehand with the MPIDR of the physical CPU the suspending logical CPU will resume on. Consequently, if doing a physical CPU migration, cpu_logical_map() must be updated appropriately somewhere between cpu_pm_enter() and cpu_suspend(). The register allocation in __cpu_suspend is reworked in order to better accommodate the additional argument. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Dave Martin <Dave.Martin@arm.com>
106 lines
2.8 KiB
C
106 lines
2.8 KiB
C
#include <linux/init.h>
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#include <linux/slab.h>
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#include <asm/cacheflush.h>
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#include <asm/idmap.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/memory.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <asm/tlbflush.h>
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extern int __cpu_suspend(unsigned long, int (*)(unsigned long), u32 cpuid);
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extern void cpu_resume_mmu(void);
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#ifdef CONFIG_MMU
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/*
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* Hide the first two arguments to __cpu_suspend - these are an implementation
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* detail which platform code shouldn't have to know about.
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*/
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int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
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{
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struct mm_struct *mm = current->active_mm;
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u32 __mpidr = cpu_logical_map(smp_processor_id());
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int ret;
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if (!idmap_pgd)
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return -EINVAL;
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/*
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* Provide a temporary page table with an identity mapping for
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* the MMU-enable code, required for resuming. On successful
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* resume (indicated by a zero return code), we need to switch
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* back to the correct page tables.
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*/
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ret = __cpu_suspend(arg, fn, __mpidr);
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if (ret == 0) {
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cpu_switch_mm(mm->pgd, mm);
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local_flush_bp_all();
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local_flush_tlb_all();
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}
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return ret;
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}
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#else
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int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
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{
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u32 __mpidr = cpu_logical_map(smp_processor_id());
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return __cpu_suspend(arg, fn, __mpidr);
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}
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#define idmap_pgd NULL
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#endif
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/*
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* This is called by __cpu_suspend() to save the state, and do whatever
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* flushing is required to ensure that when the CPU goes to sleep we have
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* the necessary data available when the caches are not searched.
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*/
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void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
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{
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u32 *ctx = ptr;
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*save_ptr = virt_to_phys(ptr);
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/* This must correspond to the LDM in cpu_resume() assembly */
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*ptr++ = virt_to_phys(idmap_pgd);
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*ptr++ = sp;
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*ptr++ = virt_to_phys(cpu_do_resume);
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cpu_do_suspend(ptr);
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flush_cache_louis();
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/*
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* flush_cache_louis does not guarantee that
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* save_ptr and ptr are cleaned to main memory,
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* just up to the Level of Unification Inner Shareable.
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* Since the context pointer and context itself
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* are to be retrieved with the MMU off that
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* data must be cleaned from all cache levels
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* to main memory using "area" cache primitives.
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*/
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__cpuc_flush_dcache_area(ctx, ptrsz);
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__cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr));
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outer_clean_range(*save_ptr, *save_ptr + ptrsz);
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outer_clean_range(virt_to_phys(save_ptr),
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virt_to_phys(save_ptr) + sizeof(*save_ptr));
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}
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extern struct sleep_save_sp sleep_save_sp;
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static int cpu_suspend_alloc_sp(void)
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{
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void *ctx_ptr;
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/* ctx_ptr is an array of physical addresses */
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ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(u32), GFP_KERNEL);
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if (WARN_ON(!ctx_ptr))
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return -ENOMEM;
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sleep_save_sp.save_ptr_stash = ctx_ptr;
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sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
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sync_cache_w(&sleep_save_sp);
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return 0;
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}
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early_initcall(cpu_suspend_alloc_sp);
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