96c5590058
The 'latency timer' of PCI devices, both Type 0 and Type 1, is setup in architecture-specific code [see: 'pcibios_set_master()']. There are two approaches being taken by all the architectures - check if the 'latency timer' is currently set between 16 and 255 and if not bring it within bounds, or, do nothing (and then there is the gratuitously different PA-RISC implementation). There is nothing architecture-specific about PCI's 'latency timer' so this patch pulls its setup functionality up into the PCI core by creating a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture-specific code. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
42 lines
860 B
C
42 lines
860 B
C
/*
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* Low-Level PCI Access for FRV machines.
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*
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* (c) 1999 Martin Mares <mj@ucw.cz>
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*/
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#include <asm/sections.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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#define PCI_PROBE_BIOS 0x0001
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#define PCI_PROBE_CONF1 0x0002
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#define PCI_PROBE_CONF2 0x0004
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#define PCI_NO_CHECKS 0x0400
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#define PCI_ASSIGN_ROMS 0x1000
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#define PCI_BIOS_IRQ_SCAN 0x2000
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#define PCI_ASSIGN_ALL_BUSSES 0x4000
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extern unsigned int __nongpreldata pci_probe;
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/* pci-frv.c */
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void pcibios_resource_survey(void);
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/* pci-vdk.c */
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extern int __nongpreldata pcibios_last_bus;
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extern struct pci_bus *__nongpreldata pci_root_bus;
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extern struct pci_ops *__nongpreldata pci_root_ops;
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/* pci-irq.c */
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extern unsigned int pcibios_irq_mask;
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void pcibios_irq_init(void);
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void pcibios_fixup_irqs(void);
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void pcibios_enable_irq(struct pci_dev *dev);
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