f2b9857eee
All of the open() functions which don't need the BKL on their face may still depend on its acquisition to serialize opens against driver initialization. So make those functions acquire then release the BKL to be on the safe side. Signed-off-by: Jonathan Corbet <corbet@lwn.net>
872 lines
22 KiB
C
872 lines
22 KiB
C
/*!*****************************************************************************
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*!
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*! Implements an interface for i2c compatible eeproms to run under Linux.
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*! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustments by
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*! Johan.Adolfsson@axis.com
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*!
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*! Probing results:
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*! 8k or not is detected (the assumes 2k or 16k)
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*! 2k or 16k detected using test reads and writes.
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*!
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*!------------------------------------------------------------------------
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*! HISTORY
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*!
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*! DATE NAME CHANGES
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*! ---- ---- -------
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*! Aug 28 1999 Edgar Iglesias Initial Version
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*! Aug 31 1999 Edgar Iglesias Allow simultaneous users.
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*! Sep 03 1999 Edgar Iglesias Updated probe.
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*! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted
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*! in the spin-lock.
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*!
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*! (c) 1999 Axis Communications AB, Lund, Sweden
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*!*****************************************************************************/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/smp_lock.h>
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#include <linux/wait.h>
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#include <asm/uaccess.h>
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#include "i2c.h"
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#define D(x)
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/* If we should use adaptive timing or not: */
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/* #define EEPROM_ADAPTIVE_TIMING */
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#define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */
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#define EEPROM_MINOR_NR 0
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/* Empirical sane initial value of the delay, the value will be adapted to
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* what the chip needs when using EEPROM_ADAPTIVE_TIMING.
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*/
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#define INITIAL_WRITEDELAY_US 4000
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#define MAX_WRITEDELAY_US 10000 /* 10 ms according to spec for 2KB EEPROM */
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/* This one defines how many times to try when eeprom fails. */
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#define EEPROM_RETRIES 10
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#define EEPROM_2KB (2 * 1024)
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/*#define EEPROM_4KB (4 * 1024)*/ /* Exists but not used in Axis products */
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#define EEPROM_8KB (8 * 1024 - 1 ) /* Last byte has write protection bit */
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#define EEPROM_16KB (16 * 1024)
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#define i2c_delay(x) udelay(x)
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/*
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* This structure describes the attached eeprom chip.
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* The values are probed for.
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*/
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struct eeprom_type
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{
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unsigned long size;
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unsigned long sequential_write_pagesize;
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unsigned char select_cmd;
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unsigned long usec_delay_writecycles; /* Min time between write cycles
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(up to 10ms for some models) */
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unsigned long usec_delay_step; /* For adaptive algorithm */
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int adapt_state; /* 1 = To high , 0 = Even, -1 = To low */
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/* this one is to keep the read/write operations atomic */
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wait_queue_head_t wait_q;
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volatile int busy;
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int retry_cnt_addr; /* Used to keep track of number of retries for
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adaptive timing adjustments */
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int retry_cnt_read;
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};
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static int eeprom_open(struct inode * inode, struct file * file);
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static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig);
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static ssize_t eeprom_read(struct file * file, char * buf, size_t count,
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loff_t *off);
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static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
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loff_t *off);
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static int eeprom_close(struct inode * inode, struct file * file);
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static int eeprom_address(unsigned long addr);
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static int read_from_eeprom(char * buf, int count);
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static int eeprom_write_buf(loff_t addr, const char * buf, int count);
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static int eeprom_read_buf(loff_t addr, char * buf, int count);
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static void eeprom_disable_write_protect(void);
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static const char eeprom_name[] = "eeprom";
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/* chip description */
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static struct eeprom_type eeprom;
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/* This is the exported file-operations structure for this device. */
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const struct file_operations eeprom_fops =
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{
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.llseek = eeprom_lseek,
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.read = eeprom_read,
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.write = eeprom_write,
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.open = eeprom_open,
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.release = eeprom_close
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};
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/* eeprom init call. Probes for different eeprom models. */
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int __init eeprom_init(void)
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{
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init_waitqueue_head(&eeprom.wait_q);
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eeprom.busy = 0;
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#ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
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#define EETEXT "Found"
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#else
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#define EETEXT "Assuming"
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#endif
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if (register_chrdev(EEPROM_MAJOR_NR, eeprom_name, &eeprom_fops))
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{
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printk(KERN_INFO "%s: unable to get major %d for eeprom device\n",
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eeprom_name, EEPROM_MAJOR_NR);
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return -1;
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}
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printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
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/*
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* Note: Most of this probing method was taken from the printserver (5470e)
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* codebase. It did not contain a way of finding the 16kB chips
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* (M24128 or variants). The method used here might not work
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* for all models. If you encounter problems the easiest way
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* is probably to define your model within #ifdef's, and hard-
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* code it.
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*/
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eeprom.size = 0;
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eeprom.usec_delay_writecycles = INITIAL_WRITEDELAY_US;
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eeprom.usec_delay_step = 128;
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eeprom.adapt_state = 0;
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#ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
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i2c_start();
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i2c_outbyte(0x80);
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if(!i2c_getack())
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{
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/* It's not 8k.. */
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int success = 0;
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unsigned char buf_2k_start[16];
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/* Im not sure this will work... :) */
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/* assume 2kB, if failure go for 16kB */
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/* Test with 16kB settings.. */
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/* If it's a 2kB EEPROM and we address it outside it's range
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* it will mirror the address space:
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* 1. We read two locations (that are mirrored),
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* if the content differs * it's a 16kB EEPROM.
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* 2. if it doesn't differ - write different value to one of the locations,
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* check the other - if content still is the same it's a 2k EEPROM,
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* restore original data.
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*/
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#define LOC1 8
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#define LOC2 (0x1fb) /*1fb, 3ed, 5df, 7d1 */
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/* 2k settings */
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i2c_stop();
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eeprom.size = EEPROM_2KB;
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eeprom.select_cmd = 0xA0;
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eeprom.sequential_write_pagesize = 16;
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if( eeprom_read_buf( 0, buf_2k_start, 16 ) == 16 )
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{
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D(printk("2k start: '%16.16s'\n", buf_2k_start));
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}
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else
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{
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printk(KERN_INFO "%s: Failed to read in 2k mode!\n", eeprom_name);
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}
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/* 16k settings */
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eeprom.size = EEPROM_16KB;
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eeprom.select_cmd = 0xA0;
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eeprom.sequential_write_pagesize = 64;
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{
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unsigned char loc1[4], loc2[4], tmp[4];
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if( eeprom_read_buf(LOC2, loc2, 4) == 4)
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{
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if( eeprom_read_buf(LOC1, loc1, 4) == 4)
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{
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D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
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LOC1, loc1, LOC2, loc2));
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#if 0
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if (memcmp(loc1, loc2, 4) != 0 )
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{
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/* It's 16k */
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printk(KERN_INFO "%s: 16k detected in step 1\n", eeprom_name);
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eeprom.size = EEPROM_16KB;
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success = 1;
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}
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else
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#endif
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{
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/* Do step 2 check */
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/* Invert value */
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loc1[0] = ~loc1[0];
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if (eeprom_write_buf(LOC1, loc1, 1) == 1)
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{
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/* If 2k EEPROM this write will actually write 10 bytes
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* from pos 0
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*/
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D(printk("1 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
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LOC1, loc1, LOC2, loc2));
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if( eeprom_read_buf(LOC1, tmp, 4) == 4)
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{
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D(printk("2 loc1: (%i) '%4.4s' tmp '%4.4s'\n",
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LOC1, loc1, tmp));
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if (memcmp(loc1, tmp, 4) != 0 )
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{
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printk(KERN_INFO "%s: read and write differs! Not 16kB\n",
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eeprom_name);
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loc1[0] = ~loc1[0];
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if (eeprom_write_buf(LOC1, loc1, 1) == 1)
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{
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success = 1;
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}
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else
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{
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printk(KERN_INFO "%s: Restore 2k failed during probe,"
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" EEPROM might be corrupt!\n", eeprom_name);
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}
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i2c_stop();
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/* Go to 2k mode and write original data */
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eeprom.size = EEPROM_2KB;
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eeprom.select_cmd = 0xA0;
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eeprom.sequential_write_pagesize = 16;
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if( eeprom_write_buf(0, buf_2k_start, 16) == 16)
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{
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}
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else
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{
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printk(KERN_INFO "%s: Failed to write back 2k start!\n",
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eeprom_name);
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}
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eeprom.size = EEPROM_2KB;
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}
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}
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if(!success)
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{
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if( eeprom_read_buf(LOC2, loc2, 1) == 1)
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{
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D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
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LOC1, loc1, LOC2, loc2));
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if (memcmp(loc1, loc2, 4) == 0 )
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{
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/* Data the same, must be mirrored -> 2k */
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/* Restore data */
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printk(KERN_INFO "%s: 2k detected in step 2\n", eeprom_name);
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loc1[0] = ~loc1[0];
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if (eeprom_write_buf(LOC1, loc1, 1) == 1)
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{
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success = 1;
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}
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else
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{
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printk(KERN_INFO "%s: Restore 2k failed during probe,"
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" EEPROM might be corrupt!\n", eeprom_name);
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}
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eeprom.size = EEPROM_2KB;
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}
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else
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{
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printk(KERN_INFO "%s: 16k detected in step 2\n",
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eeprom_name);
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loc1[0] = ~loc1[0];
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/* Data differs, assume 16k */
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/* Restore data */
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if (eeprom_write_buf(LOC1, loc1, 1) == 1)
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{
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success = 1;
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}
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else
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{
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printk(KERN_INFO "%s: Restore 16k failed during probe,"
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" EEPROM might be corrupt!\n", eeprom_name);
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}
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eeprom.size = EEPROM_16KB;
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}
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}
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}
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}
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} /* read LOC1 */
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} /* address LOC1 */
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if (!success)
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{
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printk(KERN_INFO "%s: Probing failed!, using 2KB!\n", eeprom_name);
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eeprom.size = EEPROM_2KB;
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}
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} /* read */
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}
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}
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else
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{
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i2c_outbyte(0x00);
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if(!i2c_getack())
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{
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/* No 8k */
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eeprom.size = EEPROM_2KB;
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}
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else
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{
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i2c_start();
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i2c_outbyte(0x81);
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if (!i2c_getack())
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{
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eeprom.size = EEPROM_2KB;
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}
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else
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{
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/* It's a 8kB */
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i2c_inbyte();
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eeprom.size = EEPROM_8KB;
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}
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}
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}
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i2c_stop();
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#elif defined(CONFIG_ETRAX_I2C_EEPROM_16KB)
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eeprom.size = EEPROM_16KB;
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#elif defined(CONFIG_ETRAX_I2C_EEPROM_8KB)
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eeprom.size = EEPROM_8KB;
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#elif defined(CONFIG_ETRAX_I2C_EEPROM_2KB)
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eeprom.size = EEPROM_2KB;
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#endif
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switch(eeprom.size)
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{
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case (EEPROM_2KB):
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printk("%s: " EETEXT " i2c compatible 2kB eeprom.\n", eeprom_name);
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eeprom.sequential_write_pagesize = 16;
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eeprom.select_cmd = 0xA0;
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break;
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case (EEPROM_8KB):
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printk("%s: " EETEXT " i2c compatible 8kB eeprom.\n", eeprom_name);
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eeprom.sequential_write_pagesize = 16;
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eeprom.select_cmd = 0x80;
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break;
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case (EEPROM_16KB):
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printk("%s: " EETEXT " i2c compatible 16kB eeprom.\n", eeprom_name);
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eeprom.sequential_write_pagesize = 64;
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eeprom.select_cmd = 0xA0;
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break;
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default:
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eeprom.size = 0;
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printk("%s: Did not find a supported eeprom\n", eeprom_name);
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break;
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}
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eeprom_disable_write_protect();
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return 0;
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}
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/* Opens the device. */
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static int eeprom_open(struct inode * inode, struct file * file)
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{
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cycle_kernel_lock();
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if(iminor(inode) != EEPROM_MINOR_NR)
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return -ENXIO;
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if(imajor(inode) != EEPROM_MAJOR_NR)
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return -ENXIO;
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if( eeprom.size > 0 )
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{
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/* OK */
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return 0;
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}
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/* No EEprom found */
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return -EFAULT;
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}
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/* Changes the current file position. */
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static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig)
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{
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/*
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* orig 0: position from begning of eeprom
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* orig 1: relative from current position
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* orig 2: position from last eeprom address
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*/
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switch (orig)
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{
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case 0:
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file->f_pos = offset;
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break;
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case 1:
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file->f_pos += offset;
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break;
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case 2:
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file->f_pos = eeprom.size - offset;
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break;
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default:
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return -EINVAL;
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}
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/* truncate position */
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if (file->f_pos < 0)
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{
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file->f_pos = 0;
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return(-EOVERFLOW);
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}
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if (file->f_pos >= eeprom.size)
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{
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file->f_pos = eeprom.size - 1;
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return(-EOVERFLOW);
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}
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return ( file->f_pos );
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}
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/* Reads data from eeprom. */
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static int eeprom_read_buf(loff_t addr, char * buf, int count)
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{
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struct file f;
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f.f_pos = addr;
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return eeprom_read(&f, buf, count, &addr);
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}
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/* Reads data from eeprom. */
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static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t *off)
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{
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int read=0;
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unsigned long p = file->f_pos;
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unsigned char page;
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if(p >= eeprom.size) /* Address i 0 - (size-1) */
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{
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return -EFAULT;
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}
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wait_event_interruptible(eeprom.wait_q, !eeprom.busy);
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if (signal_pending(current))
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return -EINTR;
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eeprom.busy++;
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page = (unsigned char) (p >> 8);
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if(!eeprom_address(p))
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{
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printk(KERN_INFO "%s: Read failed to address the eeprom: "
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"0x%08X (%i) page: %i\n", eeprom_name, (int)p, (int)p, page);
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i2c_stop();
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/* don't forget to wake them up */
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eeprom.busy--;
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wake_up_interruptible(&eeprom.wait_q);
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return -EFAULT;
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}
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if( (p + count) > eeprom.size)
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{
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/* truncate count */
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count = eeprom.size - p;
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}
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/* stop dummy write op and initiate the read op */
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i2c_start();
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/* special case for small eeproms */
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if(eeprom.size < EEPROM_16KB)
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{
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i2c_outbyte( eeprom.select_cmd | 1 | (page << 1) );
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}
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/* go on with the actual read */
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read = read_from_eeprom( buf, count);
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if(read > 0)
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{
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file->f_pos += read;
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}
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eeprom.busy--;
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wake_up_interruptible(&eeprom.wait_q);
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return read;
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}
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/* Writes data to eeprom. */
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static int eeprom_write_buf(loff_t addr, const char * buf, int count)
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{
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struct file f;
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f.f_pos = addr;
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return eeprom_write(&f, buf, count, &addr);
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}
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/* Writes data to eeprom. */
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static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
|
|
loff_t *off)
|
|
{
|
|
int i, written, restart=1;
|
|
unsigned long p;
|
|
|
|
if (!access_ok(VERIFY_READ, buf, count))
|
|
{
|
|
return -EFAULT;
|
|
}
|
|
|
|
wait_event_interruptible(eeprom.wait_q, !eeprom.busy);
|
|
/* bail out if we get interrupted */
|
|
if (signal_pending(current))
|
|
return -EINTR;
|
|
eeprom.busy++;
|
|
for(i = 0; (i < EEPROM_RETRIES) && (restart > 0); i++)
|
|
{
|
|
restart = 0;
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|
written = 0;
|
|
p = file->f_pos;
|
|
|
|
|
|
while( (written < count) && (p < eeprom.size))
|
|
{
|
|
/* address the eeprom */
|
|
if(!eeprom_address(p))
|
|
{
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|
printk(KERN_INFO "%s: Write failed to address the eeprom: "
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"0x%08X (%i) \n", eeprom_name, (int)p, (int)p);
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|
i2c_stop();
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|
|
|
/* don't forget to wake them up */
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|
eeprom.busy--;
|
|
wake_up_interruptible(&eeprom.wait_q);
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|
return -EFAULT;
|
|
}
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|
#ifdef EEPROM_ADAPTIVE_TIMING
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|
/* Adaptive algorithm to adjust timing */
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|
if (eeprom.retry_cnt_addr > 0)
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|
{
|
|
/* To Low now */
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|
D(printk(">D=%i d=%i\n",
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|
eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
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|
|
|
if (eeprom.usec_delay_step < 4)
|
|
{
|
|
eeprom.usec_delay_step++;
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|
eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
|
|
}
|
|
else
|
|
{
|
|
|
|
if (eeprom.adapt_state > 0)
|
|
{
|
|
/* To Low before */
|
|
eeprom.usec_delay_step *= 2;
|
|
if (eeprom.usec_delay_step > 2)
|
|
{
|
|
eeprom.usec_delay_step--;
|
|
}
|
|
eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
|
|
}
|
|
else if (eeprom.adapt_state < 0)
|
|
{
|
|
/* To High before (toggle dir) */
|
|
eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
|
|
if (eeprom.usec_delay_step > 1)
|
|
{
|
|
eeprom.usec_delay_step /= 2;
|
|
eeprom.usec_delay_step--;
|
|
}
|
|
}
|
|
}
|
|
|
|
eeprom.adapt_state = 1;
|
|
}
|
|
else
|
|
{
|
|
/* To High (or good) now */
|
|
D(printk("<D=%i d=%i\n",
|
|
eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
|
|
|
|
if (eeprom.adapt_state < 0)
|
|
{
|
|
/* To High before */
|
|
if (eeprom.usec_delay_step > 1)
|
|
{
|
|
eeprom.usec_delay_step *= 2;
|
|
eeprom.usec_delay_step--;
|
|
|
|
if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
|
|
{
|
|
eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
|
|
}
|
|
}
|
|
}
|
|
else if (eeprom.adapt_state > 0)
|
|
{
|
|
/* To Low before (toggle dir) */
|
|
if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
|
|
{
|
|
eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
|
|
}
|
|
if (eeprom.usec_delay_step > 1)
|
|
{
|
|
eeprom.usec_delay_step /= 2;
|
|
eeprom.usec_delay_step--;
|
|
}
|
|
|
|
eeprom.adapt_state = -1;
|
|
}
|
|
|
|
if (eeprom.adapt_state > -100)
|
|
{
|
|
eeprom.adapt_state--;
|
|
}
|
|
else
|
|
{
|
|
/* Restart adaption */
|
|
D(printk("#Restart\n"));
|
|
eeprom.usec_delay_step++;
|
|
}
|
|
}
|
|
#endif /* EEPROM_ADAPTIVE_TIMING */
|
|
/* write until we hit a page boundary or count */
|
|
do
|
|
{
|
|
i2c_outbyte(buf[written]);
|
|
if(!i2c_getack())
|
|
{
|
|
restart=1;
|
|
printk(KERN_INFO "%s: write error, retrying. %d\n", eeprom_name, i);
|
|
i2c_stop();
|
|
break;
|
|
}
|
|
written++;
|
|
p++;
|
|
} while( written < count && ( p % eeprom.sequential_write_pagesize ));
|
|
|
|
/* end write cycle */
|
|
i2c_stop();
|
|
i2c_delay(eeprom.usec_delay_writecycles);
|
|
} /* while */
|
|
} /* for */
|
|
|
|
eeprom.busy--;
|
|
wake_up_interruptible(&eeprom.wait_q);
|
|
if (written == 0 && file->f_pos >= eeprom.size){
|
|
return -ENOSPC;
|
|
}
|
|
file->f_pos += written;
|
|
return written;
|
|
}
|
|
|
|
/* Closes the device. */
|
|
|
|
static int eeprom_close(struct inode * inode, struct file * file)
|
|
{
|
|
/* do nothing for now */
|
|
return 0;
|
|
}
|
|
|
|
/* Sets the current address of the eeprom. */
|
|
|
|
static int eeprom_address(unsigned long addr)
|
|
{
|
|
int i;
|
|
unsigned char page, offset;
|
|
|
|
page = (unsigned char) (addr >> 8);
|
|
offset = (unsigned char) addr;
|
|
|
|
for(i = 0; i < EEPROM_RETRIES; i++)
|
|
{
|
|
/* start a dummy write for addressing */
|
|
i2c_start();
|
|
|
|
if(eeprom.size == EEPROM_16KB)
|
|
{
|
|
i2c_outbyte( eeprom.select_cmd );
|
|
i2c_getack();
|
|
i2c_outbyte(page);
|
|
}
|
|
else
|
|
{
|
|
i2c_outbyte( eeprom.select_cmd | (page << 1) );
|
|
}
|
|
if(!i2c_getack())
|
|
{
|
|
/* retry */
|
|
i2c_stop();
|
|
/* Must have a delay here.. 500 works, >50, 100->works 5th time*/
|
|
i2c_delay(MAX_WRITEDELAY_US / EEPROM_RETRIES * i);
|
|
/* The chip needs up to 10 ms from write stop to next start */
|
|
|
|
}
|
|
else
|
|
{
|
|
i2c_outbyte(offset);
|
|
|
|
if(!i2c_getack())
|
|
{
|
|
/* retry */
|
|
i2c_stop();
|
|
}
|
|
else
|
|
break;
|
|
}
|
|
}
|
|
|
|
|
|
eeprom.retry_cnt_addr = i;
|
|
D(printk("%i\n", eeprom.retry_cnt_addr));
|
|
if(eeprom.retry_cnt_addr == EEPROM_RETRIES)
|
|
{
|
|
/* failed */
|
|
return 0;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
/* Reads from current address. */
|
|
|
|
static int read_from_eeprom(char * buf, int count)
|
|
{
|
|
int i, read=0;
|
|
|
|
for(i = 0; i < EEPROM_RETRIES; i++)
|
|
{
|
|
if(eeprom.size == EEPROM_16KB)
|
|
{
|
|
i2c_outbyte( eeprom.select_cmd | 1 );
|
|
}
|
|
|
|
if(i2c_getack())
|
|
{
|
|
break;
|
|
}
|
|
}
|
|
|
|
if(i == EEPROM_RETRIES)
|
|
{
|
|
printk(KERN_INFO "%s: failed to read from eeprom\n", eeprom_name);
|
|
i2c_stop();
|
|
|
|
return -EFAULT;
|
|
}
|
|
|
|
while( (read < count))
|
|
{
|
|
if (put_user(i2c_inbyte(), &buf[read++]))
|
|
{
|
|
i2c_stop();
|
|
|
|
return -EFAULT;
|
|
}
|
|
|
|
/*
|
|
* make sure we don't ack last byte or you will get very strange
|
|
* results!
|
|
*/
|
|
if(read < count)
|
|
{
|
|
i2c_sendack();
|
|
}
|
|
}
|
|
|
|
/* stop the operation */
|
|
i2c_stop();
|
|
|
|
return read;
|
|
}
|
|
|
|
/* Disables write protection if applicable. */
|
|
|
|
#define DBP_SAVE(x)
|
|
#define ax_printf printk
|
|
static void eeprom_disable_write_protect(void)
|
|
{
|
|
/* Disable write protect */
|
|
if (eeprom.size == EEPROM_8KB)
|
|
{
|
|
/* Step 1 Set WEL = 1 (write 00000010 to address 1FFFh */
|
|
i2c_start();
|
|
i2c_outbyte(0xbe);
|
|
if(!i2c_getack())
|
|
{
|
|
DBP_SAVE(ax_printf("Get ack returns false\n"));
|
|
}
|
|
i2c_outbyte(0xFF);
|
|
if(!i2c_getack())
|
|
{
|
|
DBP_SAVE(ax_printf("Get ack returns false 2\n"));
|
|
}
|
|
i2c_outbyte(0x02);
|
|
if(!i2c_getack())
|
|
{
|
|
DBP_SAVE(ax_printf("Get ack returns false 3\n"));
|
|
}
|
|
i2c_stop();
|
|
|
|
i2c_delay(1000);
|
|
|
|
/* Step 2 Set RWEL = 1 (write 00000110 to address 1FFFh */
|
|
i2c_start();
|
|
i2c_outbyte(0xbe);
|
|
if(!i2c_getack())
|
|
{
|
|
DBP_SAVE(ax_printf("Get ack returns false 55\n"));
|
|
}
|
|
i2c_outbyte(0xFF);
|
|
if(!i2c_getack())
|
|
{
|
|
DBP_SAVE(ax_printf("Get ack returns false 52\n"));
|
|
}
|
|
i2c_outbyte(0x06);
|
|
if(!i2c_getack())
|
|
{
|
|
DBP_SAVE(ax_printf("Get ack returns false 53\n"));
|
|
}
|
|
i2c_stop();
|
|
|
|
/* Step 3 Set BP1, BP0, and/or WPEN bits (write 00000110 to address 1FFFh */
|
|
i2c_start();
|
|
i2c_outbyte(0xbe);
|
|
if(!i2c_getack())
|
|
{
|
|
DBP_SAVE(ax_printf("Get ack returns false 56\n"));
|
|
}
|
|
i2c_outbyte(0xFF);
|
|
if(!i2c_getack())
|
|
{
|
|
DBP_SAVE(ax_printf("Get ack returns false 57\n"));
|
|
}
|
|
i2c_outbyte(0x06);
|
|
if(!i2c_getack())
|
|
{
|
|
DBP_SAVE(ax_printf("Get ack returns false 58\n"));
|
|
}
|
|
i2c_stop();
|
|
|
|
/* Write protect disabled */
|
|
}
|
|
}
|
|
|
|
module_init(eeprom_init);
|