5a90cf205c
Change mark_tsc_unstable() so it takes a string argument, which holds the reason the TSC was marked unstable. This is then displayed the first time mark_tsc_unstable is called. This should help us better debug why the TSC was marked unstable on certain systems and allow us to make sure we're not being overly paranoid when throwing out this troublesome clocksource. Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andi Kleen <ak@suse.de>
67 lines
1.3 KiB
C
67 lines
1.3 KiB
C
/*
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* linux/include/asm-i386/tsc.h
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*
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* i386 TSC related functions
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*/
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#ifndef _ASM_i386_TSC_H
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#define _ASM_i386_TSC_H
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#include <asm/processor.h>
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/*
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* Standard way to access the cycle counter.
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*/
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typedef unsigned long long cycles_t;
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extern unsigned int cpu_khz;
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extern unsigned int tsc_khz;
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static inline cycles_t get_cycles(void)
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{
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unsigned long long ret = 0;
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#ifndef CONFIG_X86_TSC
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if (!cpu_has_tsc)
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return 0;
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#endif
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#if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC)
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rdtscll(ret);
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#endif
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return ret;
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}
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/* Like get_cycles, but make sure the CPU is synchronized. */
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static __always_inline cycles_t get_cycles_sync(void)
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{
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unsigned long long ret;
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#ifdef X86_FEATURE_SYNC_RDTSC
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unsigned eax;
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/*
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* Don't do an additional sync on CPUs where we know
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* RDTSC is already synchronous:
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*/
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alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC,
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"=a" (eax), "0" (1) : "ebx","ecx","edx","memory");
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#else
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sync_core();
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#endif
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rdtscll(ret);
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return ret;
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}
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extern void tsc_init(void);
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extern void mark_tsc_unstable(char *reason);
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extern int unsynchronized_tsc(void);
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extern void init_tsc_clocksource(void);
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/*
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* Boot-time check whether the TSCs are synchronized across
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* all CPUs/cores:
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*/
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extern void check_tsc_sync_source(int cpu);
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extern void check_tsc_sync_target(void);
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#endif
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