4f163eb881
In order to use the gpiolib, we now have to call gpio_request in the plaform code since it is not done in iomux code anymore. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
451 lines
11 KiB
C
451 lines
11 KiB
C
/*
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* Copyright (C) 2008 Sascha Hauer, Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/plat-ram.h>
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#include <linux/memory.h>
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#include <linux/gpio.h>
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#include <linux/smsc911x.h>
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#include <linux/interrupt.h>
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#include <linux/i2c.h>
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#include <linux/i2c/at24.h>
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#include <linux/delay.h>
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#include <linux/spi/spi.h>
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#include <linux/irq.h>
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#include <linux/fsl_devices.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include <mach/common.h>
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#include <mach/imx-uart.h>
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#include <mach/iomux-mx3.h>
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#include <mach/ipu.h>
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#include <mach/board-pcm037.h>
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#include <mach/mx3fb.h>
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#include <mach/mxc_nand.h>
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#include <mach/mmc.h>
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#ifdef CONFIG_I2C_IMX
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#include <mach/i2c.h>
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#endif
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#include "devices.h"
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static unsigned int pcm037_pins[] = {
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/* I2C */
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MX31_PIN_CSPI2_MOSI__SCL,
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MX31_PIN_CSPI2_MISO__SDA,
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/* SDHC1 */
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MX31_PIN_SD1_DATA3__SD1_DATA3,
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MX31_PIN_SD1_DATA2__SD1_DATA2,
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MX31_PIN_SD1_DATA1__SD1_DATA1,
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MX31_PIN_SD1_DATA0__SD1_DATA0,
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MX31_PIN_SD1_CLK__SD1_CLK,
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MX31_PIN_SD1_CMD__SD1_CMD,
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IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
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IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
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/* SPI1 */
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MX31_PIN_CSPI1_MOSI__MOSI,
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MX31_PIN_CSPI1_MISO__MISO,
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MX31_PIN_CSPI1_SCLK__SCLK,
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MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
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MX31_PIN_CSPI1_SS0__SS0,
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MX31_PIN_CSPI1_SS1__SS1,
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MX31_PIN_CSPI1_SS2__SS2,
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/* UART1 */
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MX31_PIN_CTS1__CTS1,
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MX31_PIN_RTS1__RTS1,
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MX31_PIN_TXD1__TXD1,
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MX31_PIN_RXD1__RXD1,
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/* UART2 */
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MX31_PIN_TXD2__TXD2,
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MX31_PIN_RXD2__RXD2,
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MX31_PIN_CTS2__CTS2,
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MX31_PIN_RTS2__RTS2,
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/* UART3 */
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MX31_PIN_CSPI3_MOSI__RXD3,
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MX31_PIN_CSPI3_MISO__TXD3,
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MX31_PIN_CSPI3_SCLK__RTS3,
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MX31_PIN_CSPI3_SPI_RDY__CTS3,
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/* LAN9217 irq pin */
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IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
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/* Onewire */
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MX31_PIN_BATT_LINE__OWIRE,
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/* Framebuffer */
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MX31_PIN_LD0__LD0,
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MX31_PIN_LD1__LD1,
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MX31_PIN_LD2__LD2,
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MX31_PIN_LD3__LD3,
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MX31_PIN_LD4__LD4,
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MX31_PIN_LD5__LD5,
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MX31_PIN_LD6__LD6,
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MX31_PIN_LD7__LD7,
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MX31_PIN_LD8__LD8,
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MX31_PIN_LD9__LD9,
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MX31_PIN_LD10__LD10,
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MX31_PIN_LD11__LD11,
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MX31_PIN_LD12__LD12,
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MX31_PIN_LD13__LD13,
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MX31_PIN_LD14__LD14,
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MX31_PIN_LD15__LD15,
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MX31_PIN_LD16__LD16,
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MX31_PIN_LD17__LD17,
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MX31_PIN_VSYNC3__VSYNC3,
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MX31_PIN_HSYNC__HSYNC,
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MX31_PIN_FPSHIFT__FPSHIFT,
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MX31_PIN_DRDY0__DRDY0,
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MX31_PIN_D3_REV__D3_REV,
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MX31_PIN_CONTRAST__CONTRAST,
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MX31_PIN_D3_SPL__D3_SPL,
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MX31_PIN_D3_CLS__D3_CLS,
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MX31_PIN_LCS0__GPI03_23,
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};
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static struct physmap_flash_data pcm037_flash_data = {
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.width = 2,
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};
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static struct resource pcm037_flash_resource = {
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.start = 0xa0000000,
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.end = 0xa1ffffff,
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.flags = IORESOURCE_MEM,
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};
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static int usbotg_pins[] = {
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MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
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MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
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MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
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MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
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MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
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MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
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MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
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MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
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MX31_PIN_USBOTG_CLK__USBOTG_CLK,
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MX31_PIN_USBOTG_DIR__USBOTG_DIR,
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MX31_PIN_USBOTG_NXT__USBOTG_NXT,
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MX31_PIN_USBOTG_STP__USBOTG_STP,
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};
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/* USB OTG HS port */
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static int __init gpio_usbotg_hs_activate(void)
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{
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int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
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ARRAY_SIZE(usbotg_pins), "usbotg");
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if (ret < 0) {
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printk(KERN_ERR "Cannot set up OTG pins\n");
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return ret;
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}
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
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return 0;
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}
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/* OTG config */
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static struct fsl_usb2_platform_data usb_pdata = {
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.operating_mode = FSL_USB2_DR_DEVICE,
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.phy_mode = FSL_USB2_PHY_ULPI,
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};
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static struct platform_device pcm037_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &pcm037_flash_data,
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},
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.resource = &pcm037_flash_resource,
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.num_resources = 1,
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};
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static struct imxuart_platform_data uart_pdata = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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static struct resource smsc911x_resources[] = {
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[0] = {
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.start = CS1_BASE_ADDR + 0x300,
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.end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
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.end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
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},
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};
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static struct smsc911x_platform_config smsc911x_info = {
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.flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
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SMSC911X_SAVE_MAC_ADDRESS,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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};
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static struct platform_device pcm037_eth = {
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.name = "smsc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(smsc911x_resources),
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.resource = smsc911x_resources,
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.dev = {
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.platform_data = &smsc911x_info,
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},
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};
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static struct platdata_mtd_ram pcm038_sram_data = {
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.bankwidth = 2,
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};
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static struct resource pcm038_sram_resource = {
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.start = CS4_BASE_ADDR,
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.end = CS4_BASE_ADDR + 512 * 1024 - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device pcm037_sram_device = {
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.name = "mtd-ram",
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.id = 0,
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.dev = {
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.platform_data = &pcm038_sram_data,
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},
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.num_resources = 1,
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.resource = &pcm038_sram_resource,
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};
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static struct mxc_nand_platform_data pcm037_nand_board_info = {
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.width = 1,
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.hw_ecc = 1,
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};
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#ifdef CONFIG_I2C_IMX
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static struct imxi2c_platform_data pcm037_i2c_1_data = {
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.bitrate = 100000,
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};
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static struct at24_platform_data board_eeprom = {
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.byte_len = 4096,
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.page_size = 32,
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.flags = AT24_FLAG_ADDR16,
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};
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static struct i2c_board_info pcm037_i2c_devices[] = {
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{
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I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
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.platform_data = &board_eeprom,
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}, {
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I2C_BOARD_INFO("rtc-pcf8563", 0x51),
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.type = "pcf8563",
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}
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};
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#endif
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/* Not connected by default */
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#ifdef PCM970_SDHC_RW_SWITCH
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static int pcm970_sdhc1_get_ro(struct device *dev)
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{
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return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
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}
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#endif
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#define SDHC1_GPIO_WP IOMUX_TO_GPIO(MX31_PIN_SFS6)
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#define SDHC1_GPIO_DET IOMUX_TO_GPIO(MX31_PIN_SCK6)
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static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
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void *data)
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{
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int ret;
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ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
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if (ret)
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return ret;
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gpio_direction_input(SDHC1_GPIO_DET);
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#ifdef PCM970_SDHC_RW_SWITCH
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ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
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if (ret)
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goto err_gpio_free;
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gpio_direction_input(SDHC1_GPIO_WP);
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#endif
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ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
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IRQF_DISABLED | IRQF_TRIGGER_FALLING,
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"sdhc-detect", data);
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if (ret)
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goto err_gpio_free_2;
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return 0;
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err_gpio_free_2:
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#ifdef PCM970_SDHC_RW_SWITCH
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gpio_free(SDHC1_GPIO_WP);
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err_gpio_free:
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#endif
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gpio_free(SDHC1_GPIO_DET);
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return ret;
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}
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static void pcm970_sdhc1_exit(struct device *dev, void *data)
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{
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free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
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gpio_free(SDHC1_GPIO_DET);
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gpio_free(SDHC1_GPIO_WP);
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}
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static struct imxmmc_platform_data sdhc_pdata = {
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#ifdef PCM970_SDHC_RW_SWITCH
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.get_ro = pcm970_sdhc1_get_ro,
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#endif
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.init = pcm970_sdhc1_init,
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.exit = pcm970_sdhc1_exit,
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};
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static struct platform_device *devices[] __initdata = {
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&pcm037_flash,
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&pcm037_sram_device,
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};
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static struct ipu_platform_data mx3_ipu_data = {
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.irq_base = MXC_IPU_IRQ_START,
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};
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static const struct fb_videomode fb_modedb[] = {
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{
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/* 240x320 @ 60 Hz Sharp */
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.name = "Sharp-LQ035Q7DH06-QVGA",
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.refresh = 60,
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.xres = 240,
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.yres = 320,
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.pixclock = 185925,
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.left_margin = 9,
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.right_margin = 16,
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.upper_margin = 7,
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.lower_margin = 9,
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.hsync_len = 1,
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.vsync_len = 1,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
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FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
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.vmode = FB_VMODE_NONINTERLACED,
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.flag = 0,
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}, {
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/* 240x320 @ 60 Hz */
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.name = "TX090",
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.refresh = 60,
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.xres = 240,
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.yres = 320,
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.pixclock = 38255,
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.left_margin = 144,
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.right_margin = 0,
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.upper_margin = 7,
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.lower_margin = 40,
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.hsync_len = 96,
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.vsync_len = 1,
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.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
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.vmode = FB_VMODE_NONINTERLACED,
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.flag = 0,
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},
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};
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static struct mx3fb_platform_data mx3fb_pdata = {
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.dma_dev = &mx3_ipu.dev,
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.name = "Sharp-LQ035Q7DH06-QVGA",
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.mode = fb_modedb,
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.num_modes = ARRAY_SIZE(fb_modedb),
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};
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/*
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* Board specific initialization.
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*/
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static void __init mxc_board_init(void)
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{
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int ret;
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mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
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"pcm037");
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platform_add_devices(devices, ARRAY_SIZE(devices));
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mxc_register_device(&mxc_uart_device0, &uart_pdata);
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mxc_register_device(&mxc_uart_device1, &uart_pdata);
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mxc_register_device(&mxc_uart_device2, &uart_pdata);
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mxc_register_device(&mxc_w1_master_device, NULL);
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/* LAN9217 IRQ pin */
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ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
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if (ret)
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pr_warning("could not get LAN irq gpio\n");
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else {
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gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
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platform_device_register(&pcm037_eth);
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}
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#ifdef CONFIG_I2C_IMX
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i2c_register_board_info(1, pcm037_i2c_devices,
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ARRAY_SIZE(pcm037_i2c_devices));
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mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data);
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#endif
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mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
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mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
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mxc_register_device(&mx3_ipu, &mx3_ipu_data);
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mxc_register_device(&mx3_fb, &mx3fb_pdata);
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if (!gpio_usbotg_hs_activate())
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mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
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}
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static void __init pcm037_timer_init(void)
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{
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mx31_clocks_init(26000000);
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}
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struct sys_timer pcm037_timer = {
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.init = pcm037_timer_init,
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};
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MACHINE_START(PCM037, "Phytec Phycore pcm037")
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/* Maintainer: Pengutronix */
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.phys_io = AIPS1_BASE_ADDR,
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.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
|
|
.boot_params = PHYS_OFFSET + 0x100,
|
|
.map_io = mx31_map_io,
|
|
.init_irq = mxc_init_irq,
|
|
.init_machine = mxc_board_init,
|
|
.timer = &pcm037_timer,
|
|
MACHINE_END
|
|
|