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kernel-fxtec-pro1x/arch/arm/mm
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Will Deacon 52af9c6cd8 ARM: 6943/1: mm: use TTBR1 instead of reserved context ID 
On ARMv7 CPUs that cache first level page table entries (like the
Cortex-A15), using a reserved ASID while changing the TTBR or flushing
the TLB is unsafe.

This is because the CPU may cache the first level entry as the result of
a speculative memory access while the reserved ASID is assigned. After
the process owning the page tables dies, the memory will be reallocated
and may be written with junk values which can be interpreted as global,
valid PTEs by the processor. This will result in the TLB being populated
with bogus global entries.

This patch avoids the use of a reserved context ID in the v7 switch_mm
and ASID rollover code by temporarily using the swapper_pg_dir pointed
at by TTBR1, which contains only global entries that are not tagged
with ASIDs.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-26 12:14:33 +01:00
..
abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S ARM: v6k: select clear exclusive code seqences according to V6 variants 2011-02-02 21:23:28 +00:00
abort-ev7.S
abort-lv4t.S
abort-macro.S
abort-nommu.S
alignment.c
cache-fa.S
cache-feroceon-l2.c
cache-l2x0.c Merge branch 'misc' into devel 2011-03-16 23:35:25 +00:00
cache-tauros2.c
cache-v3.S
cache-v4.S
cache-v4wb.S Fix common misspellings 2011-03-31 11:26:23 -03:00
cache-v4wt.S Fix common misspellings 2011-03-31 11:26:23 -03:00
cache-v6.S ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area 2011-05-26 12:14:32 +01:00
cache-v7.S ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area 2011-05-26 12:14:32 +01:00
cache-xsc3l2.c
context.c ARM: 6943/1: mm: use TTBR1 instead of reserved context ID 2011-05-26 12:14:33 +01:00
copypage-fa.c
copypage-feroceon.c
copypage-v3.c
copypage-v4mc.c
copypage-v4wb.c
copypage-v4wt.c
copypage-v6.c
copypage-xsc3.c
copypage-xscale.c
dma-mapping.c Merge branches 'fixes', 'pgt-next' and 'versatile' into devel 2011-03-20 09:32:12 +00:00
extable.c
fault-armv.c ARM: pgtable: add pud-level code 2011-02-21 19:24:14 +00:00
fault.c ARM: pgtable: add pud-level code 2011-02-21 19:24:14 +00:00
fault.h
flush.c Merge branches 'consolidate', 'ep93xx', 'fixes', 'misc', 'mmci', 'remove' and 'spear' into for-linus 2011-05-23 19:27:40 +01:00
highmem.c
idmap.c ARM: pgtable: add pud-level code 2011-02-21 19:24:14 +00:00
init.c ARM: 6913/1: sparsemem: allow pfn_valid to be overridden when using SPARSEMEM 2011-05-26 10:23:24 +01:00
iomap.c
ioremap.c Revert "ARM: relax ioremap prohibition (309caa9) for -final and -stable" 2010-12-24 09:49:52 +00:00
Kconfig Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm 2011-03-17 19:08:06 -07:00
Makefile ARM: v6k: introduce CPU_V6K option 2011-02-02 21:23:26 +00:00
mm.h ARM: pgtable: add pud-level code 2011-02-21 19:24:14 +00:00
mmap.c ARM: 6877/1: the ADDR_NO_RANDOMIZE personality flag should be honored with mmap() 2011-04-14 09:15:24 +01:00
mmu.c ARM: 6914/1: sparsemem: fix highmem detection when using SPARSEMEM 2011-05-26 10:23:25 +01:00
nommu.c
pabort-legacy.S
pabort-v6.S
pabort-v7.S
pgd.c Merge branches 'fixes', 'pgt-next' and 'versatile' into devel 2011-03-20 09:32:12 +00:00
proc-arm6_7.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-arm7tdmi.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-arm9tdmi.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-arm720.S Fix common misspellings 2011-03-31 11:26:23 -03:00
proc-arm740.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-arm920.S Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into fixes 2011-04-13 23:32:13 +01:00
proc-arm922.S Fix common misspellings 2011-03-31 11:26:23 -03:00
proc-arm925.S Fix common misspellings 2011-03-31 11:26:23 -03:00
proc-arm926.S ARM: Make consolidated PM sleep code depend on PM_SLEEP 2011-04-02 10:08:55 +01:00
proc-arm940.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-arm946.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-arm1020.S Fix common misspellings 2011-03-31 11:26:23 -03:00
proc-arm1020e.S Fix common misspellings 2011-03-31 11:26:23 -03:00
proc-arm1022.S Fix common misspellings 2011-03-31 11:26:23 -03:00
proc-arm1026.S Fix common misspellings 2011-03-31 11:26:23 -03:00
proc-fa526.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-feroceon.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-macros.S Fix common misspellings 2011-03-31 11:26:23 -03:00
proc-mohawk.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-sa110.S ARM: pm: add generic CPU suspend/resume support 2011-02-22 17:11:23 +00:00
proc-sa1100.S ARM: Make consolidated PM sleep code depend on PM_SLEEP 2011-04-02 10:08:55 +01:00
proc-syms.c
proc-v6.S ARM: 6942/1: mm: make TTBR1 always point to swapper_pg_dir on ARMv6/7 2011-05-26 12:14:32 +01:00
proc-v7.S ARM: 6943/1: mm: use TTBR1 instead of reserved context ID 2011-05-26 12:14:33 +01:00
proc-xsc3.S ARM: Make consolidated PM sleep code depend on PM_SLEEP 2011-04-02 10:08:55 +01:00
proc-xscale.S ARM: Fix .size directive for xscale_dma_a0_map_area 2011-04-28 17:56:31 +08:00
tlb-fa.S
tlb-v3.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S
tlb-v7.S
vmregion.c ARM: DMA: top-down allocation in DMA coherent region 2011-02-23 17:24:11 +00:00
vmregion.h