514820eb98
Non-SCI parts do not have the special port reg necessary for cases where the RX and SCI pins are muxed and need to be manually polled, so these like always fall back on the normal FIFO processing paths. SH7760 is in a class in and of itself with regards to mapping its SIM card interface via the SCI port class despite not having any of the RXD lines wired up and so implicitly behaving more like a SCIF in this regard. Out of the other CPUs, some support the port check via the same block while others do it through an external SuperI/O, so it's not even possible to perform the check relative to the ioremapped cookie offset, so the separate read semantics are preserved here, too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
97 lines
2.2 KiB
C
97 lines
2.2 KiB
C
#ifndef __LINUX_SERIAL_SCI_H
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#define __LINUX_SERIAL_SCI_H
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#include <linux/serial_core.h>
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#include <linux/sh_dma.h>
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/*
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* Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts)
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*/
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#define SCIx_NOT_SUPPORTED (-1)
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enum {
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SCBRR_ALGO_1, /* ((clk + 16 * bps) / (16 * bps) - 1) */
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SCBRR_ALGO_2, /* ((clk + 16 * bps) / (32 * bps) - 1) */
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SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
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SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
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SCBRR_ALGO_5, /* (((clk * 1000 / 32) / bps) - 1) */
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};
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#define SCSCR_TIE (1 << 7)
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#define SCSCR_RIE (1 << 6)
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#define SCSCR_TE (1 << 5)
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#define SCSCR_RE (1 << 4)
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#define SCSCR_REIE (1 << 3) /* not supported by all parts */
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#define SCSCR_TOIE (1 << 2) /* not supported by all parts */
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#define SCSCR_CKE1 (1 << 1)
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#define SCSCR_CKE0 (1 << 0)
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/* SCxSR SCI */
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#define SCI_TDRE 0x80
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#define SCI_RDRF 0x40
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#define SCI_ORER 0x20
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#define SCI_FER 0x10
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#define SCI_PER 0x08
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#define SCI_TEND 0x04
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#define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER)
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/* SCxSR SCIF */
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#define SCIF_ER 0x0080
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#define SCIF_TEND 0x0040
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#define SCIF_TDFE 0x0020
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#define SCIF_BRK 0x0010
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#define SCIF_FER 0x0008
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#define SCIF_PER 0x0004
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#define SCIF_RDF 0x0002
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#define SCIF_DR 0x0001
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#define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
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/* Offsets into the sci_port->irqs array */
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enum {
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SCIx_ERI_IRQ,
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SCIx_RXI_IRQ,
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SCIx_TXI_IRQ,
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SCIx_BRI_IRQ,
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SCIx_NR_IRQS,
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};
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#define SCIx_IRQ_MUXED(irq) \
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{ \
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[SCIx_ERI_IRQ] = (irq), \
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[SCIx_RXI_IRQ] = (irq), \
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[SCIx_TXI_IRQ] = (irq), \
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[SCIx_BRI_IRQ] = (irq), \
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}
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struct device;
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/*
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* Platform device specific platform_data struct
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*/
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struct plat_sci_port {
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unsigned long mapbase; /* resource base */
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unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
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unsigned int type; /* SCI / SCIF / IRDA */
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upf_t flags; /* UPF_* flags */
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unsigned int scbrr_algo_id; /* SCBRR calculation algo */
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unsigned int scscr; /* SCSCR initialization */
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/*
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* Platform overrides if necessary, defaults otherwise.
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*/
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int overrun_bit;
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unsigned int error_mask;
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int port_reg;
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struct device *dma_dev;
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unsigned int dma_slave_tx;
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unsigned int dma_slave_rx;
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};
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#endif /* __LINUX_SERIAL_SCI_H */
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