6e0411bdc2
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAlxjFL8ACgkQONu9yGCS aT643xAAk+mnsrOfU6/LBFjcJUUUYohK01UAU+PRvTjy4uH8rrA4G01xvp11ftIu jjEikA2582ScR5a2Ww+E4SfqOdKT4z9hOGLTnyI0P4xN9jeVidvu9+C90AYyBYhi orHm1osVQIj6n9+OQ5db+DzZYbZLbyfCoqNXbq9EoLvNRS3FUUH0y2VXqcz9Ghcj obpdHTVMKRaFkRWdCglo+3hSpoKrncSVpKrwUXR18GCt8jjZjj39kI9t6UoGNfc7 nN3GOd26U1tpGo6ShZJYu6aPjV+zoYNlsg1o2zn9qJANIdulYe30vqNhWCeJ+/T7 WcT3EHv4pPEO3Lvgfp+l10Nc6IbYdJEFUpAP3CvfP+MvRfKvz8Vo3Nm/BQlr20+q +MUYJb+wxhlHPRLV192XbnYFkEzZg7vzymoMPL034XheAkOkPbOK0IIVo41p5Rai LxmOdvhzfAktbtD/VWnLTUbexjs2EJ05bvZRjdPKKIMBNKnAWz4ux3KcHxpdsUF8 KMCKwpJE8KDM4uiaKVdyfMhFeIg37pmy+7Uv9cUFjWwtsL3K+CiAXg8uaSvnajKr bOhwbFIgxoOI9VRBK8M0wvzouphA0miVbxOY81sdfbMeWNpbCLdb968AFz25llta rVlWp7bSAUQTsvTkVBv6mrTKPwzO4jnfHYN8yj5gO7pr5fmC2ig= =L+Mp -----END PGP SIGNATURE----- Merge 4.19.21 into android-4.19 Changes in 4.19.21 devres: Align data[] to ARCH_KMALLOC_MINALIGN drm/bufs: Fix Spectre v1 vulnerability staging: iio: adc: ad7280a: handle error from __ad7280_read32() drm/vgem: Fix vgem_init to get drm device available. pinctrl: bcm2835: Use raw spinlock for RT compatibility ASoC: Intel: mrfld: fix uninitialized variable access gpiolib: Fix possible use after free on label drm/sun4i: Initialize registers in tcon-top driver genirq/affinity: Spread IRQs to all available NUMA nodes gpu: ipu-v3: image-convert: Prevent race between run and unprepare nds32: Fix gcc 8.0 compiler option incompatible. wil6210: fix reset flow for Talyn-mb wil6210: fix memory leak in wil_find_tx_bcast_2 ath10k: assign 'n_cipher_suites' for WCN3990 ath9k: dynack: use authentication messages for 'late' ack scsi: lpfc: Correct LCB RJT handling scsi: mpt3sas: Call sas_remove_host before removing the target devices scsi: lpfc: Fix LOGO/PLOGI handling when triggerd by ABTS Timeout event ARM: 8808/1: kexec:offline panic_smp_self_stop CPU clk: boston: fix possible memory leak in clk_boston_setup() dlm: Don't swamp the CPU with callbacks queued during recovery x86/PCI: Fix Broadcom CNB20LE unintended sign extension (redux) powerpc/pseries: add of_node_put() in dlpar_detach_node() crypto: aes_ti - disable interrupts while accessing S-box drm/vc4: ->x_scaling[1] should never be set to VC4_SCALING_NONE serial: fsl_lpuart: clear parity enable bit when disable parity ptp: check gettime64 return code in PTP_SYS_OFFSET ioctl MIPS: Boston: Disable EG20T prefetch dpaa2-ptp: defer probe when portal allocation failed iwlwifi: fw: do not set sgi bits for HE connection staging:iio:ad2s90: Make probe handle spi_setup failure fpga: altera-cvp: Fix registration for CvP incapable devices Tools: hv: kvp: Fix a warning of buffer overflow with gcc 8.0.1 fpga: altera-cvp: fix 'bad IO access' on x86_64 vbox: fix link error with 'gcc -Og' platform/chrome: don't report EC_MKBP_EVENT_SENSOR_FIFO as wakeup i40e: prevent overlapping tx_timeout recover scsi: hisi_sas: change the time of SAS SSP connection staging: iio: ad7780: update voltage on read usbnet: smsc95xx: fix rx packet alignment drm/rockchip: fix for mailbox read size ARM: OMAP2+: hwmod: Fix some section annotations drm/amd/display: fix gamma not being applied correctly drm/amd/display: calculate stream->phy_pix_clk before clock mapping bpf: libbpf: retry map creation without the name net/mlx5: EQ, Use the right place to store/read IRQ affinity hint modpost: validate symbol names also in find_elf_symbol perf tools: Add Hygon Dhyana support soc/tegra: Don't leak device tree node reference media: rc: ensure close() is called on rc_unregister_device media: video-i2c: avoid accessing released memory area when removing driver media: mtk-vcodec: Release device nodes in mtk_vcodec_init_enc_pm() staging: erofs: fix the definition of DBG_BUGON clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel clk: meson: meson8b: fix the width of the cpu_scale_div clock clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL ptp: Fix pass zero to ERR_PTR() in ptp_clock_register dmaengine: xilinx_dma: Remove __aligned attribute on zynqmp_dma_desc_ll powerpc/32: Add .data..Lubsan_data*/.data..Lubsan_type* sections explicitly iio: adc: meson-saradc: check for devm_kasprintf failure iio: adc: meson-saradc: fix internal clock names iio: accel: kxcjk1013: Add KIOX010A ACPI Hardware-ID media: adv*/tc358743/ths8200: fill in min width/height/pixelclock ACPI: SPCR: Consider baud rate 0 as preconfigured state staging: pi433: fix potential null dereference f2fs: move dir data flush to write checkpoint process f2fs: fix race between write_checkpoint and write_begin f2fs: fix wrong return value of f2fs_acl_create i2c: sh_mobile: add support for r8a77990 (R-Car E3) arm64: io: Ensure calls to delay routines are ordered against prior readX() net: aquantia: return 'err' if set MPI_DEINIT state fails sunvdc: Do not spin in an infinite loop when vio_ldc_send() returns EAGAIN soc: bcm: brcmstb: Don't leak device tree node reference nfsd4: fix crash on writing v4_end_grace before nfsd startup drm: Clear state->acquire_ctx before leaving drm_atomic_helper_commit_duplicated_state() perf: arm_spe: handle devm_kasprintf() failure arm64: io: Ensure value passed to __iormb() is held in a 64-bit register Thermal: do not clear passive state during system sleep thermal: Fix locking in cooling device sysfs update cur_state firmware/efi: Add NULL pointer checks in efivars API functions s390/zcrypt: improve special ap message cmd handling mt76x0: dfs: fix IBI_R11 configuration on non-radar channels arm64: ftrace: don't adjust the LR value drm/v3d: Fix prime imports of buffers from other drivers. ARM: dts: mmp2: fix TWSI2 ARM: dts: aspeed: add missing memory unit-address x86/fpu: Add might_fault() to user_insn() media: i2c: TDA1997x: select CONFIG_HDMI media: DaVinci-VPBE: fix error handling in vpbe_initialize() smack: fix access permissions for keyring xtensa: xtfpga.dtsi: fix dtc warnings about SPI usb: dwc3: Correct the logic for checking TRB full in __dwc3_prepare_one_trb() usb: dwc2: Disable power down feature on Samsung SoCs usb: hub: delay hub autosuspend if USB3 port is still link training timekeeping: Use proper seqcount initializer usb: mtu3: fix the issue about SetFeature(U1/U2_Enable) clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks media: imx274: select REGMAP_I2C drm/amdgpu/powerplay: fix clock stretcher limits on polaris (v2) tipc: fix node keep alive interval calculation driver core: Move async_synchronize_full call kobject: return error code if writing /sys/.../uevent fails IB/hfi1: Unreserve a reserved request when it is completed usb: dwc3: trace: add missing break statement to make compiler happy gpio: mt7621: report failure of devm_kasprintf() gpio: mt7621: pass mediatek_gpio_bank_probe() failure up the stack pinctrl: sx150x: handle failure case of devm_kstrdup iommu/amd: Fix amd_iommu=force_isolation ARM: dts: Fix OMAP4430 SDP Ethernet startup mips: bpf: fix encoding bug for mm_srlv32_op media: coda: fix H.264 deblocking filter controls ARM: dts: Fix up the D-Link DIR-685 MTD partition info watchdog: renesas_wdt: don't set divider while watchdog is running ARM: dts: imx51-zii-rdu1: Do not specify "power-gpio" for hpa1 usb: dwc3: gadget: Disable CSP for stream OUT ep iommu/arm-smmu-v3: Avoid memory corruption from Hisilicon MSI payloads iommu/arm-smmu: Add support for qcom,smmu-v2 variant iommu/arm-smmu-v3: Use explicit mb() when moving cons pointer sata_rcar: fix deferred probing clk: imx6sl: ensure MMDC CH0 handshake is bypassed platform/x86: mlx-platform: Fix tachometer registers cpuidle: big.LITTLE: fix refcount leak OPP: Use opp_table->regulators to verify no regulator case tee: optee: avoid possible double list_del() drm/msm/dsi: fix dsi clock names in DSI 10nm PLL driver drm/msm: dpu: Only check flush register against pending flushes lightnvm: pblk: fix resubmission of overwritten write err lbas lightnvm: pblk: add lock protection to list operations i2c-axxia: check for error conditions first phy: sun4i-usb: add support for missing USB PHY index mlxsw: spectrum_acl: Limit priority value udf: Fix BUG on corrupted inode switchtec: Fix SWITCHTEC_IOCTL_EVENT_IDX_ALL flags overwrite selftests/bpf: use __bpf_constant_htons in test_prog.c ARM: pxa: avoid section mismatch warning ASoC: fsl: Fix SND_SOC_EUKREA_TLV320 build error on i.MX8M KVM: PPC: Book3S: Only report KVM_CAP_SPAPR_TCE_VFIO on powernv machines mmc: bcm2835: Recover from MMC_SEND_EXT_CSD mmc: bcm2835: reset host on timeout mmc: meson-mx-sdio: check devm_kasprintf for failure memstick: Prevent memstick host from getting runtime suspended during card detection mmc: sdhci-of-esdhc: Fix timeout checks mmc: sdhci-omap: Fix timeout checks mmc: sdhci-xenon: Fix timeout checks mmc: jz4740: Get CD/WP GPIOs from descriptors usb: renesas_usbhs: add support for RZ/G2E btrfs: harden agaist duplicate fsid on scanned devices serial: sh-sci: Fix locking in sci_submit_rx() serial: sh-sci: Resume PIO in sci_rx_interrupt() on DMA failure tty: serial: samsung: Properly set flags in autoCTS mode perf test: Fix perf_event_attr test failure perf dso: Fix unchecked usage of strncpy() perf header: Fix unchecked usage of strncpy() btrfs: use tagged writepage to mitigate livelock of snapshot perf probe: Fix unchecked usage of strncpy() i2c: sh_mobile: Add support for r8a774c0 (RZ/G2E) bnxt_en: Disable MSIX before re-reserving NQs/CMPL rings. tools/power/x86/intel_pstate_tracer: Fix non root execution for post processing a trace file livepatch: check kzalloc return values arm64: KVM: Skip MMIO insn after emulation usb: musb: dsps: fix otg state machine usb: musb: dsps: fix runtime pm for peripheral mode perf header: Fix up argument to ctime() perf tools: Cast off_t to s64 to avoid warning on bionic libc percpu: convert spin_lock_irq to spin_lock_irqsave. net: hns3: fix incomplete uninitialization of IRQ in the hns3_nic_uninit_vector_data() drm/amd/display: Add retry to read ddc_clock pin Bluetooth: hci_bcm: Handle deferred probing for the clock supply drm/amd/display: fix YCbCr420 blank color powerpc/uaccess: fix warning/error with access_ok() mac80211: fix radiotap vendor presence bitmap handling xfrm6_tunnel: Fix spi check in __xfrm6_tunnel_alloc_spi mlxsw: spectrum: Properly cleanup LAG uppers when removing port from LAG scsi: smartpqi: correct host serial num for ssa scsi: smartpqi: correct volume status scsi: smartpqi: increase fw status register read timeout cw1200: Fix concurrency use-after-free bugs in cw1200_hw_scan() net: hns3: add max vector number check for pf powerpc/perf: Fix thresholding counter data for unknown type iwlwifi: mvm: fix setting HE ppe FW config powerpc/powernv/ioda: Allocate indirect TCE levels of cached userspace addresses on demand mlx5: update timecounter at least twice per counter overflow drbd: narrow rcu_read_lock in drbd_sync_handshake drbd: disconnect, if the wrong UUIDs are attached on a connected peer drbd: skip spurious timeout (ping-timeo) when failing promote drbd: Avoid Clang warning about pointless switch statment drm/amd/display: validate extended dongle caps video: clps711x-fb: release disp device node in probe() md: fix raid10 hang issue caused by barrier fbdev: fbmem: behave better with small rotated displays and many CPUs i40e: define proper net_device::neigh_priv_len ice: Do not enable NAPI on q_vectors that have no rings igb: Fix an issue that PME is not enabled during runtime suspend ACPI/APEI: Clear GHES block_status before panic() fbdev: fbcon: Fix unregister crash when more than one framebuffer powerpc/mm: Fix reporting of kernel execute faults on the 8xx pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins KVM: x86: svm: report MSR_IA32_MCG_EXT_CTL as unsupported powerpc/fadump: Do not allow hot-remove memory from fadump reserved area. kvm: Change offset in kvm_write_guest_offset_cached to unsigned NFS: nfs_compare_mount_options always compare auth flavors. perf build: Don't unconditionally link the libbfd feature test to -liberty and -lz hwmon: (lm80) fix a missing check of the status of SMBus read hwmon: (lm80) fix a missing check of bus read in lm80 probe seq_buf: Make seq_buf_puts() null-terminate the buffer crypto: ux500 - Use proper enum in cryp_set_dma_transfer crypto: ux500 - Use proper enum in hash_set_dma_transfer MIPS: ralink: Select CONFIG_CPU_MIPSR2_IRQ_VI on MT7620/8 cifs: check ntwrk_buf_start for NULL before dereferencing it f2fs: fix use-after-free issue when accessing sbi->stat_info um: Avoid marking pages with "changed protection" niu: fix missing checks of niu_pci_eeprom_read f2fs: fix sbi->extent_list corruption issue cgroup: fix parsing empty mount option string perf python: Do not force closing original perf descriptor in evlist.get_pollfd() scripts/decode_stacktrace: only strip base path when a prefix of the path arch/sh/boards/mach-kfr2r09/setup.c: fix struct mtd_oob_ops build warning ocfs2: don't clear bh uptodate for block read ocfs2: improve ocfs2 Makefile mm/page_alloc.c: don't call kasan_free_pages() at deferred mem init zram: fix lockdep warning of free block handling isdn: hisax: hfc_pci: Fix a possible concurrency use-after-free bug in HFCPCI_l1hw() gdrom: fix a memory leak bug fsl/fman: Use GFP_ATOMIC in {memac,tgec}_add_hash_mac_address() block/swim3: Fix -EBUSY error when re-opening device after unmount thermal: bcm2835: enable hwmon explicitly kdb: Don't back trace on a cpu that didn't round up PCI: imx: Enable MSI from downstream components thermal: generic-adc: Fix adc to temp interpolation HID: lenovo: Add checks to fix of_led_classdev_register arm64/sve: ptrace: Fix SVE_PT_REGS_OFFSET definition kernel/hung_task.c: break RCU locks based on jiffies proc/sysctl: fix return error for proc_doulongvec_minmax() kernel/hung_task.c: force console verbose before panic fs/epoll: drop ovflist branch prediction exec: load_script: don't blindly truncate shebang string kernel/kcov.c: mark write_comp_data() as notrace scripts/gdb: fix lx-version string output xfs: Fix xqmstats offsets in /proc/fs/xfs/xqmstat xfs: cancel COW blocks before swapext xfs: Fix error code in 'xfs_ioc_getbmap()' xfs: fix overflow in xfs_attr3_leaf_verify xfs: fix shared extent data corruption due to missing cow reservation xfs: fix transient reference count error in xfs_buf_resubmit_failed_buffers xfs: delalloc -> unwritten COW fork allocation can go wrong fs/xfs: fix f_ffree value for statfs when project quota is set xfs: fix PAGE_MASK usage in xfs_free_file_space xfs: fix inverted return from xfs_btree_sblock_verify_crc thermal: hwmon: inline helpers when CONFIG_THERMAL_HWMON is not set dccp: fool proof ccid_hc_[rt]x_parse_options() enic: fix checksum validation for IPv6 lib/test_rhashtable: Make test_insert_dup() allocate its hash table dynamically net: dp83640: expire old TX-skb net: dsa: Fix lockdep false positive splat net: dsa: Fix NULL checking in dsa_slave_set_eee() net: dsa: mv88e6xxx: Fix counting of ATU violations net: dsa: slave: Don't propagate flag changes on down slave interfaces net/mlx5e: Force CHECKSUM_UNNECESSARY for short ethernet frames net: systemport: Fix WoL with password after deep sleep rds: fix refcount bug in rds_sock_addref Revert "net: phy: marvell: avoid pause mode on SGMII-to-Copper for 88e151x" rxrpc: bad unlock balance in rxrpc_recvmsg sctp: check and update stream->out_curr when allocating stream_out sctp: walk the list of asoc safely skge: potential memory corruption in skge_get_regs() virtio_net: Account for tx bytes and packets on sending xdp_frames net/mlx5e: FPGA, fix Innova IPsec TX offload data path performance xfs: eof trim writeback mapping as soon as it is cached ALSA: compress: Fix stop handling on compressed capture streams ALSA: usb-audio: Add support for new T+A USB DAC ALSA: hda - Serialize codec registrations ALSA: hda/realtek - Fix lose hp_pins for disable auto mute ALSA: hda/realtek - Use a common helper for hp pin reference ALSA: hda/realtek - Headset microphone support for System76 darp5 fuse: call pipe_buf_release() under pipe lock fuse: decrement NR_WRITEBACK_TEMP on the right page fuse: handle zero sized retrieve correctly HID: debug: fix the ring buffer implementation dmaengine: bcm2835: Fix interrupt race on RT dmaengine: bcm2835: Fix abort of transactions dmaengine: imx-dma: fix wrong callback invoke futex: Handle early deadlock return correctly irqchip/gic-v3-its: Plug allocation race for devices sharing a DevID usb: phy: am335x: fix race condition in _probe usb: dwc3: gadget: Handle 0 xfer length for OUT EP usb: gadget: udc: net2272: Fix bitwise and boolean operations usb: gadget: musb: fix short isoc packets with inventra dma staging: speakup: fix tty-operation NULL derefs scsi: cxlflash: Prevent deadlock when adapter probe fails scsi: aic94xx: fix module loading KVM: x86: work around leak of uninitialized stack contents (CVE-2019-7222) kvm: fix kvm_ioctl_create_device() reference counting (CVE-2019-6974) KVM: nVMX: unconditionally cancel preemption timer in free_nested (CVE-2019-7221) cpu/hotplug: Fix "SMT disabled by BIOS" detection for KVM perf/x86/intel/uncore: Add Node ID mask x86/MCE: Initialize mce.bank in the case of a fatal error in mce_no_way_out() perf/core: Don't WARN() for impossible ring-buffer sizes perf tests evsel-tp-sched: Fix bitwise operator serial: fix race between flush_to_ldisc and tty_open serial: 8250_pci: Make PCI class test non fatal serial: sh-sci: Do not free irqs that have already been freed cacheinfo: Keep the old value if of_property_read_u32 fails IB/hfi1: Add limit test for RC/UC send via loopback perf/x86/intel: Delay memory deallocation until x86_pmu_dead_cpu() ath9k: dynack: make ewma estimation faster ath9k: dynack: check da->enabled first in sampling routines Linux 4.19.21 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
1908 lines
55 KiB
Text
1908 lines
55 KiB
Text
# SPDX-License-Identifier: GPL-2.0
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#
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# Generic algorithms support
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#
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config XOR_BLOCKS
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tristate
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#
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# async_tx api: hardware offloaded memory transfer/transform support
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#
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source "crypto/async_tx/Kconfig"
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#
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# Cryptographic API Configuration
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#
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menuconfig CRYPTO
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tristate "Cryptographic API"
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help
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This option provides the core Cryptographic API.
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if CRYPTO
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comment "Crypto core or helper"
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config CRYPTO_FIPS
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bool "FIPS 200 compliance"
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depends on (CRYPTO_ANSI_CPRNG || CRYPTO_DRBG) && !CRYPTO_MANAGER_DISABLE_TESTS
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depends on (MODULE_SIG || !MODULES)
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help
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This options enables the fips boot option which is
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required if you want to system to operate in a FIPS 200
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certification. You should say no unless you know what
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this is.
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config CRYPTO_ALGAPI
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tristate
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select CRYPTO_ALGAPI2
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help
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This option provides the API for cryptographic algorithms.
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config CRYPTO_ALGAPI2
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tristate
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config CRYPTO_AEAD
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tristate
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select CRYPTO_AEAD2
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select CRYPTO_ALGAPI
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config CRYPTO_AEAD2
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tristate
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select CRYPTO_ALGAPI2
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select CRYPTO_NULL2
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select CRYPTO_RNG2
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config CRYPTO_BLKCIPHER
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tristate
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select CRYPTO_BLKCIPHER2
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select CRYPTO_ALGAPI
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config CRYPTO_BLKCIPHER2
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tristate
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select CRYPTO_ALGAPI2
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select CRYPTO_RNG2
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select CRYPTO_WORKQUEUE
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config CRYPTO_HASH
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tristate
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select CRYPTO_HASH2
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select CRYPTO_ALGAPI
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config CRYPTO_HASH2
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tristate
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select CRYPTO_ALGAPI2
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config CRYPTO_RNG
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tristate
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select CRYPTO_RNG2
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select CRYPTO_ALGAPI
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config CRYPTO_RNG2
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tristate
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select CRYPTO_ALGAPI2
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config CRYPTO_RNG_DEFAULT
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tristate
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select CRYPTO_DRBG_MENU
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config CRYPTO_AKCIPHER2
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tristate
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select CRYPTO_ALGAPI2
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config CRYPTO_AKCIPHER
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tristate
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select CRYPTO_AKCIPHER2
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select CRYPTO_ALGAPI
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config CRYPTO_KPP2
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tristate
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select CRYPTO_ALGAPI2
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config CRYPTO_KPP
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tristate
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select CRYPTO_ALGAPI
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select CRYPTO_KPP2
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config CRYPTO_ACOMP2
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tristate
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select CRYPTO_ALGAPI2
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select SGL_ALLOC
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config CRYPTO_ACOMP
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tristate
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select CRYPTO_ALGAPI
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select CRYPTO_ACOMP2
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config CRYPTO_RSA
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tristate "RSA algorithm"
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select CRYPTO_AKCIPHER
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select CRYPTO_MANAGER
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select MPILIB
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select ASN1
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help
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Generic implementation of the RSA public key algorithm.
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config CRYPTO_DH
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tristate "Diffie-Hellman algorithm"
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select CRYPTO_KPP
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select MPILIB
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help
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Generic implementation of the Diffie-Hellman algorithm.
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config CRYPTO_ECDH
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tristate "ECDH algorithm"
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select CRYPTO_KPP
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select CRYPTO_RNG_DEFAULT
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help
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Generic implementation of the ECDH algorithm
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config CRYPTO_MANAGER
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tristate "Cryptographic algorithm manager"
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select CRYPTO_MANAGER2
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help
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Create default cryptographic template instantiations such as
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cbc(aes).
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config CRYPTO_MANAGER2
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def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y)
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select CRYPTO_AEAD2
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select CRYPTO_HASH2
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select CRYPTO_BLKCIPHER2
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select CRYPTO_AKCIPHER2
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select CRYPTO_KPP2
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select CRYPTO_ACOMP2
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config CRYPTO_USER
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tristate "Userspace cryptographic algorithm configuration"
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depends on NET
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select CRYPTO_MANAGER
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help
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Userspace configuration for cryptographic instantiations such as
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cbc(aes).
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config CRYPTO_MANAGER_DISABLE_TESTS
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bool "Disable run-time self tests"
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default y
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depends on CRYPTO_MANAGER2
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help
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Disable run-time self tests that normally take place at
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algorithm registration.
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config CRYPTO_GF128MUL
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tristate "GF(2^128) multiplication functions"
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help
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Efficient table driven implementation of multiplications in the
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field GF(2^128). This is needed by some cypher modes. This
|
|
option will be selected automatically if you select such a
|
|
cipher mode. Only select this option by hand if you expect to load
|
|
an external module that requires these functions.
|
|
|
|
config CRYPTO_NULL
|
|
tristate "Null algorithms"
|
|
select CRYPTO_NULL2
|
|
help
|
|
These are 'Null' algorithms, used by IPsec, which do nothing.
|
|
|
|
config CRYPTO_NULL2
|
|
tristate
|
|
select CRYPTO_ALGAPI2
|
|
select CRYPTO_BLKCIPHER2
|
|
select CRYPTO_HASH2
|
|
|
|
config CRYPTO_PCRYPT
|
|
tristate "Parallel crypto engine"
|
|
depends on SMP
|
|
select PADATA
|
|
select CRYPTO_MANAGER
|
|
select CRYPTO_AEAD
|
|
help
|
|
This converts an arbitrary crypto algorithm into a parallel
|
|
algorithm that executes in kernel threads.
|
|
|
|
config CRYPTO_WORKQUEUE
|
|
tristate
|
|
|
|
config CRYPTO_CRYPTD
|
|
tristate "Software async crypto daemon"
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_HASH
|
|
select CRYPTO_MANAGER
|
|
select CRYPTO_WORKQUEUE
|
|
help
|
|
This is a generic software asynchronous crypto daemon that
|
|
converts an arbitrary synchronous software crypto algorithm
|
|
into an asynchronous algorithm that executes in a kernel thread.
|
|
|
|
config CRYPTO_MCRYPTD
|
|
tristate "Software async multi-buffer crypto daemon"
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_HASH
|
|
select CRYPTO_MANAGER
|
|
select CRYPTO_WORKQUEUE
|
|
help
|
|
This is a generic software asynchronous crypto daemon that
|
|
provides the kernel thread to assist multi-buffer crypto
|
|
algorithms for submitting jobs and flushing jobs in multi-buffer
|
|
crypto algorithms. Multi-buffer crypto algorithms are executed
|
|
in the context of this kernel thread and drivers can post
|
|
their crypto request asynchronously to be processed by this daemon.
|
|
|
|
config CRYPTO_AUTHENC
|
|
tristate "Authenc support"
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_MANAGER
|
|
select CRYPTO_HASH
|
|
select CRYPTO_NULL
|
|
help
|
|
Authenc: Combined mode wrapper for IPsec.
|
|
This is required for IPSec.
|
|
|
|
config CRYPTO_TEST
|
|
tristate "Testing module"
|
|
depends on m
|
|
select CRYPTO_MANAGER
|
|
help
|
|
Quick & dirty crypto test module.
|
|
|
|
config CRYPTO_SIMD
|
|
tristate
|
|
select CRYPTO_CRYPTD
|
|
|
|
config CRYPTO_GLUE_HELPER_X86
|
|
tristate
|
|
depends on X86
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
config CRYPTO_ENGINE
|
|
tristate
|
|
|
|
comment "Authenticated Encryption with Associated Data"
|
|
|
|
config CRYPTO_CCM
|
|
tristate "CCM support"
|
|
select CRYPTO_CTR
|
|
select CRYPTO_HASH
|
|
select CRYPTO_AEAD
|
|
help
|
|
Support for Counter with CBC MAC. Required for IPsec.
|
|
|
|
config CRYPTO_GCM
|
|
tristate "GCM/GMAC support"
|
|
select CRYPTO_CTR
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_GHASH
|
|
select CRYPTO_NULL
|
|
help
|
|
Support for Galois/Counter Mode (GCM) and Galois Message
|
|
Authentication Code (GMAC). Required for IPSec.
|
|
|
|
config CRYPTO_CHACHA20POLY1305
|
|
tristate "ChaCha20-Poly1305 AEAD support"
|
|
select CRYPTO_CHACHA20
|
|
select CRYPTO_POLY1305
|
|
select CRYPTO_AEAD
|
|
help
|
|
ChaCha20-Poly1305 AEAD support, RFC7539.
|
|
|
|
Support for the AEAD wrapper using the ChaCha20 stream cipher combined
|
|
with the Poly1305 authenticator. It is defined in RFC7539 for use in
|
|
IETF protocols.
|
|
|
|
config CRYPTO_AEGIS128
|
|
tristate "AEGIS-128 AEAD algorithm"
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_AES # for AES S-box tables
|
|
help
|
|
Support for the AEGIS-128 dedicated AEAD algorithm.
|
|
|
|
config CRYPTO_AEGIS128L
|
|
tristate "AEGIS-128L AEAD algorithm"
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_AES # for AES S-box tables
|
|
help
|
|
Support for the AEGIS-128L dedicated AEAD algorithm.
|
|
|
|
config CRYPTO_AEGIS256
|
|
tristate "AEGIS-256 AEAD algorithm"
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_AES # for AES S-box tables
|
|
help
|
|
Support for the AEGIS-256 dedicated AEAD algorithm.
|
|
|
|
config CRYPTO_AEGIS128_AESNI_SSE2
|
|
tristate "AEGIS-128 AEAD algorithm (x86_64 AESNI+SSE2 implementation)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_CRYPTD
|
|
help
|
|
AESNI+SSE2 implementation of the AEGSI-128 dedicated AEAD algorithm.
|
|
|
|
config CRYPTO_AEGIS128L_AESNI_SSE2
|
|
tristate "AEGIS-128L AEAD algorithm (x86_64 AESNI+SSE2 implementation)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_CRYPTD
|
|
help
|
|
AESNI+SSE2 implementation of the AEGSI-128L dedicated AEAD algorithm.
|
|
|
|
config CRYPTO_AEGIS256_AESNI_SSE2
|
|
tristate "AEGIS-256 AEAD algorithm (x86_64 AESNI+SSE2 implementation)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_CRYPTD
|
|
help
|
|
AESNI+SSE2 implementation of the AEGSI-256 dedicated AEAD algorithm.
|
|
|
|
config CRYPTO_MORUS640
|
|
tristate "MORUS-640 AEAD algorithm"
|
|
select CRYPTO_AEAD
|
|
help
|
|
Support for the MORUS-640 dedicated AEAD algorithm.
|
|
|
|
config CRYPTO_MORUS640_GLUE
|
|
tristate
|
|
depends on X86
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_CRYPTD
|
|
help
|
|
Common glue for SIMD optimizations of the MORUS-640 dedicated AEAD
|
|
algorithm.
|
|
|
|
config CRYPTO_MORUS640_SSE2
|
|
tristate "MORUS-640 AEAD algorithm (x86_64 SSE2 implementation)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_MORUS640_GLUE
|
|
help
|
|
SSE2 implementation of the MORUS-640 dedicated AEAD algorithm.
|
|
|
|
config CRYPTO_MORUS1280
|
|
tristate "MORUS-1280 AEAD algorithm"
|
|
select CRYPTO_AEAD
|
|
help
|
|
Support for the MORUS-1280 dedicated AEAD algorithm.
|
|
|
|
config CRYPTO_MORUS1280_GLUE
|
|
tristate
|
|
depends on X86
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_CRYPTD
|
|
help
|
|
Common glue for SIMD optimizations of the MORUS-1280 dedicated AEAD
|
|
algorithm.
|
|
|
|
config CRYPTO_MORUS1280_SSE2
|
|
tristate "MORUS-1280 AEAD algorithm (x86_64 SSE2 implementation)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_MORUS1280_GLUE
|
|
help
|
|
SSE2 optimizedimplementation of the MORUS-1280 dedicated AEAD
|
|
algorithm.
|
|
|
|
config CRYPTO_MORUS1280_AVX2
|
|
tristate "MORUS-1280 AEAD algorithm (x86_64 AVX2 implementation)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_MORUS1280_GLUE
|
|
help
|
|
AVX2 optimized implementation of the MORUS-1280 dedicated AEAD
|
|
algorithm.
|
|
|
|
config CRYPTO_SEQIV
|
|
tristate "Sequence Number IV Generator"
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_NULL
|
|
select CRYPTO_RNG_DEFAULT
|
|
help
|
|
This IV generator generates an IV based on a sequence number by
|
|
xoring it with a salt. This algorithm is mainly useful for CTR
|
|
|
|
config CRYPTO_ECHAINIV
|
|
tristate "Encrypted Chain IV Generator"
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_NULL
|
|
select CRYPTO_RNG_DEFAULT
|
|
default m
|
|
help
|
|
This IV generator generates an IV based on the encryption of
|
|
a sequence number xored with a salt. This is the default
|
|
algorithm for CBC.
|
|
|
|
comment "Block modes"
|
|
|
|
config CRYPTO_CBC
|
|
tristate "CBC support"
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_MANAGER
|
|
help
|
|
CBC: Cipher Block Chaining mode
|
|
This block cipher algorithm is required for IPSec.
|
|
|
|
config CRYPTO_CFB
|
|
tristate "CFB support"
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_MANAGER
|
|
help
|
|
CFB: Cipher FeedBack mode
|
|
This block cipher algorithm is required for TPM2 Cryptography.
|
|
|
|
config CRYPTO_CTR
|
|
tristate "CTR support"
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_SEQIV
|
|
select CRYPTO_MANAGER
|
|
help
|
|
CTR: Counter mode
|
|
This block cipher algorithm is required for IPSec.
|
|
|
|
config CRYPTO_CTS
|
|
tristate "CTS support"
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
CTS: Cipher Text Stealing
|
|
This is the Cipher Text Stealing mode as described by
|
|
Section 8 of rfc2040 and referenced by rfc3962.
|
|
(rfc3962 includes errata information in its Appendix A)
|
|
This mode is required for Kerberos gss mechanism support
|
|
for AES encryption.
|
|
|
|
config CRYPTO_ECB
|
|
tristate "ECB support"
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_MANAGER
|
|
help
|
|
ECB: Electronic CodeBook mode
|
|
This is the simplest block cipher algorithm. It simply encrypts
|
|
the input block by block.
|
|
|
|
config CRYPTO_LRW
|
|
tristate "LRW support"
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_MANAGER
|
|
select CRYPTO_GF128MUL
|
|
help
|
|
LRW: Liskov Rivest Wagner, a tweakable, non malleable, non movable
|
|
narrow block cipher mode for dm-crypt. Use it with cipher
|
|
specification string aes-lrw-benbi, the key must be 256, 320 or 384.
|
|
The first 128, 192 or 256 bits in the key are used for AES and the
|
|
rest is used to tie each cipher block to its logical position.
|
|
|
|
config CRYPTO_PCBC
|
|
tristate "PCBC support"
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_MANAGER
|
|
help
|
|
PCBC: Propagating Cipher Block Chaining mode
|
|
This block cipher algorithm is required for RxRPC.
|
|
|
|
config CRYPTO_XTS
|
|
tristate "XTS support"
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_MANAGER
|
|
select CRYPTO_ECB
|
|
help
|
|
XTS: IEEE1619/D16 narrow block cipher use with aes-xts-plain,
|
|
key size 256, 384 or 512 bits. This implementation currently
|
|
can't handle a sectorsize which is not a multiple of 16 bytes.
|
|
|
|
config CRYPTO_KEYWRAP
|
|
tristate "Key wrapping support"
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
Support for key wrapping (NIST SP800-38F / RFC3394) without
|
|
padding.
|
|
|
|
config CRYPTO_NHPOLY1305
|
|
tristate
|
|
select CRYPTO_HASH
|
|
select CRYPTO_POLY1305
|
|
|
|
config CRYPTO_ADIANTUM
|
|
tristate "Adiantum support"
|
|
select CRYPTO_CHACHA20
|
|
select CRYPTO_POLY1305
|
|
select CRYPTO_NHPOLY1305
|
|
help
|
|
Adiantum is a tweakable, length-preserving encryption mode
|
|
designed for fast and secure disk encryption, especially on
|
|
CPUs without dedicated crypto instructions. It encrypts
|
|
each sector using the XChaCha12 stream cipher, two passes of
|
|
an ε-almost-∆-universal hash function, and an invocation of
|
|
the AES-256 block cipher on a single 16-byte block. On CPUs
|
|
without AES instructions, Adiantum is much faster than
|
|
AES-XTS.
|
|
|
|
Adiantum's security is provably reducible to that of its
|
|
underlying stream and block ciphers, subject to a security
|
|
bound. Unlike XTS, Adiantum is a true wide-block encryption
|
|
mode, so it actually provides an even stronger notion of
|
|
security than XTS, subject to the security bound.
|
|
|
|
If unsure, say N.
|
|
|
|
comment "Hash modes"
|
|
|
|
config CRYPTO_CMAC
|
|
tristate "CMAC support"
|
|
select CRYPTO_HASH
|
|
select CRYPTO_MANAGER
|
|
help
|
|
Cipher-based Message Authentication Code (CMAC) specified by
|
|
The National Institute of Standards and Technology (NIST).
|
|
|
|
https://tools.ietf.org/html/rfc4493
|
|
http://csrc.nist.gov/publications/nistpubs/800-38B/SP_800-38B.pdf
|
|
|
|
config CRYPTO_HMAC
|
|
tristate "HMAC support"
|
|
select CRYPTO_HASH
|
|
select CRYPTO_MANAGER
|
|
help
|
|
HMAC: Keyed-Hashing for Message Authentication (RFC2104).
|
|
This is required for IPSec.
|
|
|
|
config CRYPTO_XCBC
|
|
tristate "XCBC support"
|
|
select CRYPTO_HASH
|
|
select CRYPTO_MANAGER
|
|
help
|
|
XCBC: Keyed-Hashing with encryption algorithm
|
|
http://www.ietf.org/rfc/rfc3566.txt
|
|
http://csrc.nist.gov/encryption/modes/proposedmodes/
|
|
xcbc-mac/xcbc-mac-spec.pdf
|
|
|
|
config CRYPTO_VMAC
|
|
tristate "VMAC support"
|
|
select CRYPTO_HASH
|
|
select CRYPTO_MANAGER
|
|
help
|
|
VMAC is a message authentication algorithm designed for
|
|
very high speed on 64-bit architectures.
|
|
|
|
See also:
|
|
<http://fastcrypto.org/vmac>
|
|
|
|
comment "Digest"
|
|
|
|
config CRYPTO_CRC32C
|
|
tristate "CRC32c CRC algorithm"
|
|
select CRYPTO_HASH
|
|
select CRC32
|
|
help
|
|
Castagnoli, et al Cyclic Redundancy-Check Algorithm. Used
|
|
by iSCSI for header and data digests and by others.
|
|
See Castagnoli93. Module will be crc32c.
|
|
|
|
config CRYPTO_CRC32C_INTEL
|
|
tristate "CRC32c INTEL hardware acceleration"
|
|
depends on X86
|
|
select CRYPTO_HASH
|
|
help
|
|
In Intel processor with SSE4.2 supported, the processor will
|
|
support CRC32C implementation using hardware accelerated CRC32
|
|
instruction. This option will create 'crc32c-intel' module,
|
|
which will enable any routine to use the CRC32 instruction to
|
|
gain performance compared with software implementation.
|
|
Module will be crc32c-intel.
|
|
|
|
config CRYPTO_CRC32C_VPMSUM
|
|
tristate "CRC32c CRC algorithm (powerpc64)"
|
|
depends on PPC64 && ALTIVEC
|
|
select CRYPTO_HASH
|
|
select CRC32
|
|
help
|
|
CRC32c algorithm implemented using vector polynomial multiply-sum
|
|
(vpmsum) instructions, introduced in POWER8. Enable on POWER8
|
|
and newer processors for improved performance.
|
|
|
|
|
|
config CRYPTO_CRC32C_SPARC64
|
|
tristate "CRC32c CRC algorithm (SPARC64)"
|
|
depends on SPARC64
|
|
select CRYPTO_HASH
|
|
select CRC32
|
|
help
|
|
CRC32c CRC algorithm implemented using sparc64 crypto instructions,
|
|
when available.
|
|
|
|
config CRYPTO_CRC32
|
|
tristate "CRC32 CRC algorithm"
|
|
select CRYPTO_HASH
|
|
select CRC32
|
|
help
|
|
CRC-32-IEEE 802.3 cyclic redundancy-check algorithm.
|
|
Shash crypto api wrappers to crc32_le function.
|
|
|
|
config CRYPTO_CRC32_PCLMUL
|
|
tristate "CRC32 PCLMULQDQ hardware acceleration"
|
|
depends on X86
|
|
select CRYPTO_HASH
|
|
select CRC32
|
|
help
|
|
From Intel Westmere and AMD Bulldozer processor with SSE4.2
|
|
and PCLMULQDQ supported, the processor will support
|
|
CRC32 PCLMULQDQ implementation using hardware accelerated PCLMULQDQ
|
|
instruction. This option will create 'crc32-plcmul' module,
|
|
which will enable any routine to use the CRC-32-IEEE 802.3 checksum
|
|
and gain better performance as compared with the table implementation.
|
|
|
|
config CRYPTO_CRC32_MIPS
|
|
tristate "CRC32c and CRC32 CRC algorithm (MIPS)"
|
|
depends on MIPS_CRC_SUPPORT
|
|
select CRYPTO_HASH
|
|
help
|
|
CRC32c and CRC32 CRC algorithms implemented using mips crypto
|
|
instructions, when available.
|
|
|
|
|
|
config CRYPTO_CRCT10DIF
|
|
tristate "CRCT10DIF algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
CRC T10 Data Integrity Field computation is being cast as
|
|
a crypto transform. This allows for faster crc t10 diff
|
|
transforms to be used if they are available.
|
|
|
|
config CRYPTO_CRCT10DIF_PCLMUL
|
|
tristate "CRCT10DIF PCLMULQDQ hardware acceleration"
|
|
depends on X86 && 64BIT && CRC_T10DIF
|
|
select CRYPTO_HASH
|
|
help
|
|
For x86_64 processors with SSE4.2 and PCLMULQDQ supported,
|
|
CRC T10 DIF PCLMULQDQ computation can be hardware
|
|
accelerated PCLMULQDQ instruction. This option will create
|
|
'crct10dif-plcmul' module, which is faster when computing the
|
|
crct10dif checksum as compared with the generic table implementation.
|
|
|
|
config CRYPTO_CRCT10DIF_VPMSUM
|
|
tristate "CRC32T10DIF powerpc64 hardware acceleration"
|
|
depends on PPC64 && ALTIVEC && CRC_T10DIF
|
|
select CRYPTO_HASH
|
|
help
|
|
CRC10T10DIF algorithm implemented using vector polynomial
|
|
multiply-sum (vpmsum) instructions, introduced in POWER8. Enable on
|
|
POWER8 and newer processors for improved performance.
|
|
|
|
config CRYPTO_VPMSUM_TESTER
|
|
tristate "Powerpc64 vpmsum hardware acceleration tester"
|
|
depends on CRYPTO_CRCT10DIF_VPMSUM && CRYPTO_CRC32C_VPMSUM
|
|
help
|
|
Stress test for CRC32c and CRC-T10DIF algorithms implemented with
|
|
POWER8 vpmsum instructions.
|
|
Unless you are testing these algorithms, you don't need this.
|
|
|
|
config CRYPTO_GHASH
|
|
tristate "GHASH digest algorithm"
|
|
select CRYPTO_GF128MUL
|
|
select CRYPTO_HASH
|
|
help
|
|
GHASH is message digest algorithm for GCM (Galois/Counter Mode).
|
|
|
|
config CRYPTO_POLY1305
|
|
tristate "Poly1305 authenticator algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
Poly1305 authenticator algorithm, RFC7539.
|
|
|
|
Poly1305 is an authenticator algorithm designed by Daniel J. Bernstein.
|
|
It is used for the ChaCha20-Poly1305 AEAD, specified in RFC7539 for use
|
|
in IETF protocols. This is the portable C implementation of Poly1305.
|
|
|
|
config CRYPTO_POLY1305_X86_64
|
|
tristate "Poly1305 authenticator algorithm (x86_64/SSE2/AVX2)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_POLY1305
|
|
help
|
|
Poly1305 authenticator algorithm, RFC7539.
|
|
|
|
Poly1305 is an authenticator algorithm designed by Daniel J. Bernstein.
|
|
It is used for the ChaCha20-Poly1305 AEAD, specified in RFC7539 for use
|
|
in IETF protocols. This is the x86_64 assembler implementation using SIMD
|
|
instructions.
|
|
|
|
config CRYPTO_MD4
|
|
tristate "MD4 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
MD4 message digest algorithm (RFC1320).
|
|
|
|
config CRYPTO_MD5
|
|
tristate "MD5 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
MD5 message digest algorithm (RFC1321).
|
|
|
|
config CRYPTO_MD5_OCTEON
|
|
tristate "MD5 digest algorithm (OCTEON)"
|
|
depends on CPU_CAVIUM_OCTEON
|
|
select CRYPTO_MD5
|
|
select CRYPTO_HASH
|
|
help
|
|
MD5 message digest algorithm (RFC1321) implemented
|
|
using OCTEON crypto instructions, when available.
|
|
|
|
config CRYPTO_MD5_PPC
|
|
tristate "MD5 digest algorithm (PPC)"
|
|
depends on PPC
|
|
select CRYPTO_HASH
|
|
help
|
|
MD5 message digest algorithm (RFC1321) implemented
|
|
in PPC assembler.
|
|
|
|
config CRYPTO_MD5_SPARC64
|
|
tristate "MD5 digest algorithm (SPARC64)"
|
|
depends on SPARC64
|
|
select CRYPTO_MD5
|
|
select CRYPTO_HASH
|
|
help
|
|
MD5 message digest algorithm (RFC1321) implemented
|
|
using sparc64 crypto instructions, when available.
|
|
|
|
config CRYPTO_MICHAEL_MIC
|
|
tristate "Michael MIC keyed digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
Michael MIC is used for message integrity protection in TKIP
|
|
(IEEE 802.11i). This algorithm is required for TKIP, but it
|
|
should not be used for other purposes because of the weakness
|
|
of the algorithm.
|
|
|
|
config CRYPTO_RMD128
|
|
tristate "RIPEMD-128 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
RIPEMD-128 (ISO/IEC 10118-3:2004).
|
|
|
|
RIPEMD-128 is a 128-bit cryptographic hash function. It should only
|
|
be used as a secure replacement for RIPEMD. For other use cases,
|
|
RIPEMD-160 should be used.
|
|
|
|
Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
|
|
See <http://homes.esat.kuleuven.be/~bosselae/ripemd160.html>
|
|
|
|
config CRYPTO_RMD160
|
|
tristate "RIPEMD-160 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
RIPEMD-160 (ISO/IEC 10118-3:2004).
|
|
|
|
RIPEMD-160 is a 160-bit cryptographic hash function. It is intended
|
|
to be used as a secure replacement for the 128-bit hash functions
|
|
MD4, MD5 and it's predecessor RIPEMD
|
|
(not to be confused with RIPEMD-128).
|
|
|
|
It's speed is comparable to SHA1 and there are no known attacks
|
|
against RIPEMD-160.
|
|
|
|
Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
|
|
See <http://homes.esat.kuleuven.be/~bosselae/ripemd160.html>
|
|
|
|
config CRYPTO_RMD256
|
|
tristate "RIPEMD-256 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
RIPEMD-256 is an optional extension of RIPEMD-128 with a
|
|
256 bit hash. It is intended for applications that require
|
|
longer hash-results, without needing a larger security level
|
|
(than RIPEMD-128).
|
|
|
|
Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
|
|
See <http://homes.esat.kuleuven.be/~bosselae/ripemd160.html>
|
|
|
|
config CRYPTO_RMD320
|
|
tristate "RIPEMD-320 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
RIPEMD-320 is an optional extension of RIPEMD-160 with a
|
|
320 bit hash. It is intended for applications that require
|
|
longer hash-results, without needing a larger security level
|
|
(than RIPEMD-160).
|
|
|
|
Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
|
|
See <http://homes.esat.kuleuven.be/~bosselae/ripemd160.html>
|
|
|
|
config CRYPTO_SHA1
|
|
tristate "SHA1 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
|
|
|
|
config CRYPTO_SHA1_SSSE3
|
|
tristate "SHA1 digest algorithm (SSSE3/AVX/AVX2/SHA-NI)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
|
|
using Supplemental SSE3 (SSSE3) instructions or Advanced Vector
|
|
Extensions (AVX/AVX2) or SHA-NI(SHA Extensions New Instructions),
|
|
when available.
|
|
|
|
config CRYPTO_SHA256_SSSE3
|
|
tristate "SHA256 digest algorithm (SSSE3/AVX/AVX2/SHA-NI)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-256 secure hash standard (DFIPS 180-2) implemented
|
|
using Supplemental SSE3 (SSSE3) instructions, or Advanced Vector
|
|
Extensions version 1 (AVX1), or Advanced Vector Extensions
|
|
version 2 (AVX2) instructions, or SHA-NI (SHA Extensions New
|
|
Instructions) when available.
|
|
|
|
config CRYPTO_SHA512_SSSE3
|
|
tristate "SHA512 digest algorithm (SSSE3/AVX/AVX2)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_SHA512
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-512 secure hash standard (DFIPS 180-2) implemented
|
|
using Supplemental SSE3 (SSSE3) instructions, or Advanced Vector
|
|
Extensions version 1 (AVX1), or Advanced Vector Extensions
|
|
version 2 (AVX2) instructions, when available.
|
|
|
|
config CRYPTO_SHA1_OCTEON
|
|
tristate "SHA1 digest algorithm (OCTEON)"
|
|
depends on CPU_CAVIUM_OCTEON
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
|
|
using OCTEON crypto instructions, when available.
|
|
|
|
config CRYPTO_SHA1_SPARC64
|
|
tristate "SHA1 digest algorithm (SPARC64)"
|
|
depends on SPARC64
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
|
|
using sparc64 crypto instructions, when available.
|
|
|
|
config CRYPTO_SHA1_PPC
|
|
tristate "SHA1 digest algorithm (powerpc)"
|
|
depends on PPC
|
|
help
|
|
This is the powerpc hardware accelerated implementation of the
|
|
SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
|
|
|
|
config CRYPTO_SHA1_PPC_SPE
|
|
tristate "SHA1 digest algorithm (PPC SPE)"
|
|
depends on PPC && SPE
|
|
help
|
|
SHA-1 secure hash standard (DFIPS 180-4) implemented
|
|
using powerpc SPE SIMD instruction set.
|
|
|
|
config CRYPTO_SHA1_MB
|
|
tristate "SHA1 digest algorithm (x86_64 Multi-Buffer, Experimental)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_HASH
|
|
select CRYPTO_MCRYPTD
|
|
help
|
|
SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
|
|
using multi-buffer technique. This algorithm computes on
|
|
multiple data lanes concurrently with SIMD instructions for
|
|
better throughput. It should not be enabled by default but
|
|
used when there is significant amount of work to keep the keep
|
|
the data lanes filled to get performance benefit. If the data
|
|
lanes remain unfilled, a flush operation will be initiated to
|
|
process the crypto jobs, adding a slight latency.
|
|
|
|
config CRYPTO_SHA256_MB
|
|
tristate "SHA256 digest algorithm (x86_64 Multi-Buffer, Experimental)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_HASH
|
|
select CRYPTO_MCRYPTD
|
|
help
|
|
SHA-256 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
|
|
using multi-buffer technique. This algorithm computes on
|
|
multiple data lanes concurrently with SIMD instructions for
|
|
better throughput. It should not be enabled by default but
|
|
used when there is significant amount of work to keep the keep
|
|
the data lanes filled to get performance benefit. If the data
|
|
lanes remain unfilled, a flush operation will be initiated to
|
|
process the crypto jobs, adding a slight latency.
|
|
|
|
config CRYPTO_SHA512_MB
|
|
tristate "SHA512 digest algorithm (x86_64 Multi-Buffer, Experimental)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_SHA512
|
|
select CRYPTO_HASH
|
|
select CRYPTO_MCRYPTD
|
|
help
|
|
SHA-512 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
|
|
using multi-buffer technique. This algorithm computes on
|
|
multiple data lanes concurrently with SIMD instructions for
|
|
better throughput. It should not be enabled by default but
|
|
used when there is significant amount of work to keep the keep
|
|
the data lanes filled to get performance benefit. If the data
|
|
lanes remain unfilled, a flush operation will be initiated to
|
|
process the crypto jobs, adding a slight latency.
|
|
|
|
config CRYPTO_SHA256
|
|
tristate "SHA224 and SHA256 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA256 secure hash standard (DFIPS 180-2).
|
|
|
|
This version of SHA implements a 256 bit hash with 128 bits of
|
|
security against collision attacks.
|
|
|
|
This code also includes SHA-224, a 224 bit hash with 112 bits
|
|
of security against collision attacks.
|
|
|
|
config CRYPTO_SHA256_PPC_SPE
|
|
tristate "SHA224 and SHA256 digest algorithm (PPC SPE)"
|
|
depends on PPC && SPE
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA224 and SHA256 secure hash standard (DFIPS 180-2)
|
|
implemented using powerpc SPE SIMD instruction set.
|
|
|
|
config CRYPTO_SHA256_OCTEON
|
|
tristate "SHA224 and SHA256 digest algorithm (OCTEON)"
|
|
depends on CPU_CAVIUM_OCTEON
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-256 secure hash standard (DFIPS 180-2) implemented
|
|
using OCTEON crypto instructions, when available.
|
|
|
|
config CRYPTO_SHA256_SPARC64
|
|
tristate "SHA224 and SHA256 digest algorithm (SPARC64)"
|
|
depends on SPARC64
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-256 secure hash standard (DFIPS 180-2) implemented
|
|
using sparc64 crypto instructions, when available.
|
|
|
|
config CRYPTO_SHA512
|
|
tristate "SHA384 and SHA512 digest algorithms"
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA512 secure hash standard (DFIPS 180-2).
|
|
|
|
This version of SHA implements a 512 bit hash with 256 bits of
|
|
security against collision attacks.
|
|
|
|
This code also includes SHA-384, a 384 bit hash with 192 bits
|
|
of security against collision attacks.
|
|
|
|
config CRYPTO_SHA512_OCTEON
|
|
tristate "SHA384 and SHA512 digest algorithms (OCTEON)"
|
|
depends on CPU_CAVIUM_OCTEON
|
|
select CRYPTO_SHA512
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-512 secure hash standard (DFIPS 180-2) implemented
|
|
using OCTEON crypto instructions, when available.
|
|
|
|
config CRYPTO_SHA512_SPARC64
|
|
tristate "SHA384 and SHA512 digest algorithm (SPARC64)"
|
|
depends on SPARC64
|
|
select CRYPTO_SHA512
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-512 secure hash standard (DFIPS 180-2) implemented
|
|
using sparc64 crypto instructions, when available.
|
|
|
|
config CRYPTO_SHA3
|
|
tristate "SHA3 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
SHA-3 secure hash standard (DFIPS 202). It's based on
|
|
cryptographic sponge function family called Keccak.
|
|
|
|
References:
|
|
http://keccak.noekeon.org/
|
|
|
|
config CRYPTO_SM3
|
|
tristate "SM3 digest algorithm"
|
|
select CRYPTO_HASH
|
|
help
|
|
SM3 secure hash function as defined by OSCCA GM/T 0004-2012 SM3).
|
|
It is part of the Chinese Commercial Cryptography suite.
|
|
|
|
References:
|
|
http://www.oscca.gov.cn/UpFile/20101222141857786.pdf
|
|
https://datatracker.ietf.org/doc/html/draft-shen-sm3-hash
|
|
|
|
config CRYPTO_TGR192
|
|
tristate "Tiger digest algorithms"
|
|
select CRYPTO_HASH
|
|
help
|
|
Tiger hash algorithm 192, 160 and 128-bit hashes
|
|
|
|
Tiger is a hash function optimized for 64-bit processors while
|
|
still having decent performance on 32-bit processors.
|
|
Tiger was developed by Ross Anderson and Eli Biham.
|
|
|
|
See also:
|
|
<http://www.cs.technion.ac.il/~biham/Reports/Tiger/>.
|
|
|
|
config CRYPTO_WP512
|
|
tristate "Whirlpool digest algorithms"
|
|
select CRYPTO_HASH
|
|
help
|
|
Whirlpool hash algorithm 512, 384 and 256-bit hashes
|
|
|
|
Whirlpool-512 is part of the NESSIE cryptographic primitives.
|
|
Whirlpool will be part of the ISO/IEC 10118-3:2003(E) standard
|
|
|
|
See also:
|
|
<http://www.larc.usp.br/~pbarreto/WhirlpoolPage.html>
|
|
|
|
config CRYPTO_GHASH_CLMUL_NI_INTEL
|
|
tristate "GHASH digest algorithm (CLMUL-NI accelerated)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_CRYPTD
|
|
help
|
|
GHASH is message digest algorithm for GCM (Galois/Counter Mode).
|
|
The implementation is accelerated by CLMUL-NI of Intel.
|
|
|
|
comment "Ciphers"
|
|
|
|
config CRYPTO_AES
|
|
tristate "AES cipher algorithms"
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
AES cipher algorithms (FIPS-197). AES uses the Rijndael
|
|
algorithm.
|
|
|
|
Rijndael appears to be consistently a very good performer in
|
|
both hardware and software across a wide range of computing
|
|
environments regardless of its use in feedback or non-feedback
|
|
modes. Its key setup time is excellent, and its key agility is
|
|
good. Rijndael's very low memory requirements make it very well
|
|
suited for restricted-space environments, in which it also
|
|
demonstrates excellent performance. Rijndael's operations are
|
|
among the easiest to defend against power and timing attacks.
|
|
|
|
The AES specifies three key sizes: 128, 192 and 256 bits
|
|
|
|
See <http://csrc.nist.gov/CryptoToolkit/aes/> for more information.
|
|
|
|
config CRYPTO_AES_TI
|
|
tristate "Fixed time AES cipher"
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
This is a generic implementation of AES that attempts to eliminate
|
|
data dependent latencies as much as possible without affecting
|
|
performance too much. It is intended for use by the generic CCM
|
|
and GCM drivers, and other CTR or CMAC/XCBC based modes that rely
|
|
solely on encryption (although decryption is supported as well, but
|
|
with a more dramatic performance hit)
|
|
|
|
Instead of using 16 lookup tables of 1 KB each, (8 for encryption and
|
|
8 for decryption), this implementation only uses just two S-boxes of
|
|
256 bytes each, and attempts to eliminate data dependent latencies by
|
|
prefetching the entire table into the cache at the start of each
|
|
block. Interrupts are also disabled to avoid races where cachelines
|
|
are evicted when the CPU is interrupted to do something else.
|
|
|
|
config CRYPTO_AES_586
|
|
tristate "AES cipher algorithms (i586)"
|
|
depends on (X86 || UML_X86) && !64BIT
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_AES
|
|
help
|
|
AES cipher algorithms (FIPS-197). AES uses the Rijndael
|
|
algorithm.
|
|
|
|
Rijndael appears to be consistently a very good performer in
|
|
both hardware and software across a wide range of computing
|
|
environments regardless of its use in feedback or non-feedback
|
|
modes. Its key setup time is excellent, and its key agility is
|
|
good. Rijndael's very low memory requirements make it very well
|
|
suited for restricted-space environments, in which it also
|
|
demonstrates excellent performance. Rijndael's operations are
|
|
among the easiest to defend against power and timing attacks.
|
|
|
|
The AES specifies three key sizes: 128, 192 and 256 bits
|
|
|
|
See <http://csrc.nist.gov/encryption/aes/> for more information.
|
|
|
|
config CRYPTO_AES_X86_64
|
|
tristate "AES cipher algorithms (x86_64)"
|
|
depends on (X86 || UML_X86) && 64BIT
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_AES
|
|
help
|
|
AES cipher algorithms (FIPS-197). AES uses the Rijndael
|
|
algorithm.
|
|
|
|
Rijndael appears to be consistently a very good performer in
|
|
both hardware and software across a wide range of computing
|
|
environments regardless of its use in feedback or non-feedback
|
|
modes. Its key setup time is excellent, and its key agility is
|
|
good. Rijndael's very low memory requirements make it very well
|
|
suited for restricted-space environments, in which it also
|
|
demonstrates excellent performance. Rijndael's operations are
|
|
among the easiest to defend against power and timing attacks.
|
|
|
|
The AES specifies three key sizes: 128, 192 and 256 bits
|
|
|
|
See <http://csrc.nist.gov/encryption/aes/> for more information.
|
|
|
|
config CRYPTO_AES_NI_INTEL
|
|
tristate "AES cipher algorithms (AES-NI)"
|
|
depends on X86
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_AES_X86_64 if 64BIT
|
|
select CRYPTO_AES_586 if !64BIT
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_GLUE_HELPER_X86 if 64BIT
|
|
select CRYPTO_SIMD
|
|
help
|
|
Use Intel AES-NI instructions for AES algorithm.
|
|
|
|
AES cipher algorithms (FIPS-197). AES uses the Rijndael
|
|
algorithm.
|
|
|
|
Rijndael appears to be consistently a very good performer in
|
|
both hardware and software across a wide range of computing
|
|
environments regardless of its use in feedback or non-feedback
|
|
modes. Its key setup time is excellent, and its key agility is
|
|
good. Rijndael's very low memory requirements make it very well
|
|
suited for restricted-space environments, in which it also
|
|
demonstrates excellent performance. Rijndael's operations are
|
|
among the easiest to defend against power and timing attacks.
|
|
|
|
The AES specifies three key sizes: 128, 192 and 256 bits
|
|
|
|
See <http://csrc.nist.gov/encryption/aes/> for more information.
|
|
|
|
In addition to AES cipher algorithm support, the acceleration
|
|
for some popular block cipher mode is supported too, including
|
|
ECB, CBC, LRW, PCBC, XTS. The 64 bit version has additional
|
|
acceleration for CTR.
|
|
|
|
config CRYPTO_AES_SPARC64
|
|
tristate "AES cipher algorithms (SPARC64)"
|
|
depends on SPARC64
|
|
select CRYPTO_CRYPTD
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
Use SPARC64 crypto opcodes for AES algorithm.
|
|
|
|
AES cipher algorithms (FIPS-197). AES uses the Rijndael
|
|
algorithm.
|
|
|
|
Rijndael appears to be consistently a very good performer in
|
|
both hardware and software across a wide range of computing
|
|
environments regardless of its use in feedback or non-feedback
|
|
modes. Its key setup time is excellent, and its key agility is
|
|
good. Rijndael's very low memory requirements make it very well
|
|
suited for restricted-space environments, in which it also
|
|
demonstrates excellent performance. Rijndael's operations are
|
|
among the easiest to defend against power and timing attacks.
|
|
|
|
The AES specifies three key sizes: 128, 192 and 256 bits
|
|
|
|
See <http://csrc.nist.gov/encryption/aes/> for more information.
|
|
|
|
In addition to AES cipher algorithm support, the acceleration
|
|
for some popular block cipher mode is supported too, including
|
|
ECB and CBC.
|
|
|
|
config CRYPTO_AES_PPC_SPE
|
|
tristate "AES cipher algorithms (PPC SPE)"
|
|
depends on PPC && SPE
|
|
help
|
|
AES cipher algorithms (FIPS-197). Additionally the acceleration
|
|
for popular block cipher modes ECB, CBC, CTR and XTS is supported.
|
|
This module should only be used for low power (router) devices
|
|
without hardware AES acceleration (e.g. caam crypto). It reduces the
|
|
size of the AES tables from 16KB to 8KB + 256 bytes and mitigates
|
|
timining attacks. Nevertheless it might be not as secure as other
|
|
architecture specific assembler implementations that work on 1KB
|
|
tables or 256 bytes S-boxes.
|
|
|
|
config CRYPTO_ANUBIS
|
|
tristate "Anubis cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
Anubis cipher algorithm.
|
|
|
|
Anubis is a variable key length cipher which can use keys from
|
|
128 bits to 320 bits in length. It was evaluated as a entrant
|
|
in the NESSIE competition.
|
|
|
|
See also:
|
|
<https://www.cosic.esat.kuleuven.be/nessie/reports/>
|
|
<http://www.larc.usp.br/~pbarreto/AnubisPage.html>
|
|
|
|
config CRYPTO_ARC4
|
|
tristate "ARC4 cipher algorithm"
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
ARC4 cipher algorithm.
|
|
|
|
ARC4 is a stream cipher using keys ranging from 8 bits to 2048
|
|
bits in length. This algorithm is required for driver-based
|
|
WEP, but it should not be for other purposes because of the
|
|
weakness of the algorithm.
|
|
|
|
config CRYPTO_BLOWFISH
|
|
tristate "Blowfish cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_BLOWFISH_COMMON
|
|
help
|
|
Blowfish cipher algorithm, by Bruce Schneier.
|
|
|
|
This is a variable key length cipher which can use keys from 32
|
|
bits to 448 bits in length. It's fast, simple and specifically
|
|
designed for use on "large microprocessors".
|
|
|
|
See also:
|
|
<http://www.schneier.com/blowfish.html>
|
|
|
|
config CRYPTO_BLOWFISH_COMMON
|
|
tristate
|
|
help
|
|
Common parts of the Blowfish cipher algorithm shared by the
|
|
generic c and the assembler implementations.
|
|
|
|
See also:
|
|
<http://www.schneier.com/blowfish.html>
|
|
|
|
config CRYPTO_BLOWFISH_X86_64
|
|
tristate "Blowfish cipher algorithm (x86_64)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_BLOWFISH_COMMON
|
|
help
|
|
Blowfish cipher algorithm (x86_64), by Bruce Schneier.
|
|
|
|
This is a variable key length cipher which can use keys from 32
|
|
bits to 448 bits in length. It's fast, simple and specifically
|
|
designed for use on "large microprocessors".
|
|
|
|
See also:
|
|
<http://www.schneier.com/blowfish.html>
|
|
|
|
config CRYPTO_CAMELLIA
|
|
tristate "Camellia cipher algorithms"
|
|
depends on CRYPTO
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
Camellia cipher algorithms module.
|
|
|
|
Camellia is a symmetric key block cipher developed jointly
|
|
at NTT and Mitsubishi Electric Corporation.
|
|
|
|
The Camellia specifies three key sizes: 128, 192 and 256 bits.
|
|
|
|
See also:
|
|
<https://info.isl.ntt.co.jp/crypt/eng/camellia/index_s.html>
|
|
|
|
config CRYPTO_CAMELLIA_X86_64
|
|
tristate "Camellia cipher algorithm (x86_64)"
|
|
depends on X86 && 64BIT
|
|
depends on CRYPTO
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_GLUE_HELPER_X86
|
|
help
|
|
Camellia cipher algorithm module (x86_64).
|
|
|
|
Camellia is a symmetric key block cipher developed jointly
|
|
at NTT and Mitsubishi Electric Corporation.
|
|
|
|
The Camellia specifies three key sizes: 128, 192 and 256 bits.
|
|
|
|
See also:
|
|
<https://info.isl.ntt.co.jp/crypt/eng/camellia/index_s.html>
|
|
|
|
config CRYPTO_CAMELLIA_AESNI_AVX_X86_64
|
|
tristate "Camellia cipher algorithm (x86_64/AES-NI/AVX)"
|
|
depends on X86 && 64BIT
|
|
depends on CRYPTO
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_CAMELLIA_X86_64
|
|
select CRYPTO_GLUE_HELPER_X86
|
|
select CRYPTO_SIMD
|
|
select CRYPTO_XTS
|
|
help
|
|
Camellia cipher algorithm module (x86_64/AES-NI/AVX).
|
|
|
|
Camellia is a symmetric key block cipher developed jointly
|
|
at NTT and Mitsubishi Electric Corporation.
|
|
|
|
The Camellia specifies three key sizes: 128, 192 and 256 bits.
|
|
|
|
See also:
|
|
<https://info.isl.ntt.co.jp/crypt/eng/camellia/index_s.html>
|
|
|
|
config CRYPTO_CAMELLIA_AESNI_AVX2_X86_64
|
|
tristate "Camellia cipher algorithm (x86_64/AES-NI/AVX2)"
|
|
depends on X86 && 64BIT
|
|
depends on CRYPTO
|
|
select CRYPTO_CAMELLIA_AESNI_AVX_X86_64
|
|
help
|
|
Camellia cipher algorithm module (x86_64/AES-NI/AVX2).
|
|
|
|
Camellia is a symmetric key block cipher developed jointly
|
|
at NTT and Mitsubishi Electric Corporation.
|
|
|
|
The Camellia specifies three key sizes: 128, 192 and 256 bits.
|
|
|
|
See also:
|
|
<https://info.isl.ntt.co.jp/crypt/eng/camellia/index_s.html>
|
|
|
|
config CRYPTO_CAMELLIA_SPARC64
|
|
tristate "Camellia cipher algorithm (SPARC64)"
|
|
depends on SPARC64
|
|
depends on CRYPTO
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
Camellia cipher algorithm module (SPARC64).
|
|
|
|
Camellia is a symmetric key block cipher developed jointly
|
|
at NTT and Mitsubishi Electric Corporation.
|
|
|
|
The Camellia specifies three key sizes: 128, 192 and 256 bits.
|
|
|
|
See also:
|
|
<https://info.isl.ntt.co.jp/crypt/eng/camellia/index_s.html>
|
|
|
|
config CRYPTO_CAST_COMMON
|
|
tristate
|
|
help
|
|
Common parts of the CAST cipher algorithms shared by the
|
|
generic c and the assembler implementations.
|
|
|
|
config CRYPTO_CAST5
|
|
tristate "CAST5 (CAST-128) cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_CAST_COMMON
|
|
help
|
|
The CAST5 encryption algorithm (synonymous with CAST-128) is
|
|
described in RFC2144.
|
|
|
|
config CRYPTO_CAST5_AVX_X86_64
|
|
tristate "CAST5 (CAST-128) cipher algorithm (x86_64/AVX)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_CAST5
|
|
select CRYPTO_CAST_COMMON
|
|
select CRYPTO_SIMD
|
|
help
|
|
The CAST5 encryption algorithm (synonymous with CAST-128) is
|
|
described in RFC2144.
|
|
|
|
This module provides the Cast5 cipher algorithm that processes
|
|
sixteen blocks parallel using the AVX instruction set.
|
|
|
|
config CRYPTO_CAST6
|
|
tristate "CAST6 (CAST-256) cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_CAST_COMMON
|
|
help
|
|
The CAST6 encryption algorithm (synonymous with CAST-256) is
|
|
described in RFC2612.
|
|
|
|
config CRYPTO_CAST6_AVX_X86_64
|
|
tristate "CAST6 (CAST-256) cipher algorithm (x86_64/AVX)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_CAST6
|
|
select CRYPTO_CAST_COMMON
|
|
select CRYPTO_GLUE_HELPER_X86
|
|
select CRYPTO_SIMD
|
|
select CRYPTO_XTS
|
|
help
|
|
The CAST6 encryption algorithm (synonymous with CAST-256) is
|
|
described in RFC2612.
|
|
|
|
This module provides the Cast6 cipher algorithm that processes
|
|
eight blocks parallel using the AVX instruction set.
|
|
|
|
config CRYPTO_DES
|
|
tristate "DES and Triple DES EDE cipher algorithms"
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
|
|
|
|
config CRYPTO_DES_SPARC64
|
|
tristate "DES and Triple DES EDE cipher algorithms (SPARC64)"
|
|
depends on SPARC64
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_DES
|
|
help
|
|
DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3),
|
|
optimized using SPARC64 crypto opcodes.
|
|
|
|
config CRYPTO_DES3_EDE_X86_64
|
|
tristate "Triple DES EDE cipher algorithm (x86-64)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_DES
|
|
help
|
|
Triple DES EDE (FIPS 46-3) algorithm.
|
|
|
|
This module provides implementation of the Triple DES EDE cipher
|
|
algorithm that is optimized for x86-64 processors. Two versions of
|
|
algorithm are provided; regular processing one input block and
|
|
one that processes three blocks parallel.
|
|
|
|
config CRYPTO_FCRYPT
|
|
tristate "FCrypt cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
FCrypt algorithm used by RxRPC.
|
|
|
|
config CRYPTO_KHAZAD
|
|
tristate "Khazad cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
Khazad cipher algorithm.
|
|
|
|
Khazad was a finalist in the initial NESSIE competition. It is
|
|
an algorithm optimized for 64-bit processors with good performance
|
|
on 32-bit processors. Khazad uses an 128 bit key size.
|
|
|
|
See also:
|
|
<http://www.larc.usp.br/~pbarreto/KhazadPage.html>
|
|
|
|
config CRYPTO_SALSA20
|
|
tristate "Salsa20 stream cipher algorithm"
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
Salsa20 stream cipher algorithm.
|
|
|
|
Salsa20 is a stream cipher submitted to eSTREAM, the ECRYPT
|
|
Stream Cipher Project. See <http://www.ecrypt.eu.org/stream/>
|
|
|
|
The Salsa20 stream cipher algorithm is designed by Daniel J.
|
|
Bernstein <djb@cr.yp.to>. See <http://cr.yp.to/snuffle.html>
|
|
|
|
config CRYPTO_CHACHA20
|
|
tristate "ChaCha stream cipher algorithms"
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
The ChaCha20, XChaCha20, and XChaCha12 stream cipher algorithms.
|
|
|
|
ChaCha20 is a 256-bit high-speed stream cipher designed by Daniel J.
|
|
Bernstein and further specified in RFC7539 for use in IETF protocols.
|
|
This is the portable C implementation of ChaCha20. See also:
|
|
<http://cr.yp.to/chacha/chacha-20080128.pdf>
|
|
|
|
XChaCha20 is the application of the XSalsa20 construction to ChaCha20
|
|
rather than to Salsa20. XChaCha20 extends ChaCha20's nonce length
|
|
from 64 bits (or 96 bits using the RFC7539 convention) to 192 bits,
|
|
while provably retaining ChaCha20's security. See also:
|
|
<https://cr.yp.to/snuffle/xsalsa-20081128.pdf>
|
|
|
|
XChaCha12 is XChaCha20 reduced to 12 rounds, with correspondingly
|
|
reduced security margin but increased performance. It can be needed
|
|
in some performance-sensitive scenarios.
|
|
|
|
config CRYPTO_CHACHA20_X86_64
|
|
tristate "ChaCha20 cipher algorithm (x86_64/SSSE3/AVX2)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_CHACHA20
|
|
help
|
|
ChaCha20 cipher algorithm, RFC7539.
|
|
|
|
ChaCha20 is a 256-bit high-speed stream cipher designed by Daniel J.
|
|
Bernstein and further specified in RFC7539 for use in IETF protocols.
|
|
This is the x86_64 assembler implementation using SIMD instructions.
|
|
|
|
See also:
|
|
<http://cr.yp.to/chacha/chacha-20080128.pdf>
|
|
|
|
config CRYPTO_SEED
|
|
tristate "SEED cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
SEED cipher algorithm (RFC4269).
|
|
|
|
SEED is a 128-bit symmetric key block cipher that has been
|
|
developed by KISA (Korea Information Security Agency) as a
|
|
national standard encryption algorithm of the Republic of Korea.
|
|
It is a 16 round block cipher with the key size of 128 bit.
|
|
|
|
See also:
|
|
<http://www.kisa.or.kr/kisa/seed/jsp/seed_eng.jsp>
|
|
|
|
config CRYPTO_SERPENT
|
|
tristate "Serpent cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
Serpent cipher algorithm, by Anderson, Biham & Knudsen.
|
|
|
|
Keys are allowed to be from 0 to 256 bits in length, in steps
|
|
of 8 bits. Also includes the 'Tnepres' algorithm, a reversed
|
|
variant of Serpent for compatibility with old kerneli.org code.
|
|
|
|
See also:
|
|
<http://www.cl.cam.ac.uk/~rja14/serpent.html>
|
|
|
|
config CRYPTO_SERPENT_SSE2_X86_64
|
|
tristate "Serpent cipher algorithm (x86_64/SSE2)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_GLUE_HELPER_X86
|
|
select CRYPTO_SERPENT
|
|
select CRYPTO_SIMD
|
|
help
|
|
Serpent cipher algorithm, by Anderson, Biham & Knudsen.
|
|
|
|
Keys are allowed to be from 0 to 256 bits in length, in steps
|
|
of 8 bits.
|
|
|
|
This module provides Serpent cipher algorithm that processes eight
|
|
blocks parallel using SSE2 instruction set.
|
|
|
|
See also:
|
|
<http://www.cl.cam.ac.uk/~rja14/serpent.html>
|
|
|
|
config CRYPTO_SERPENT_SSE2_586
|
|
tristate "Serpent cipher algorithm (i586/SSE2)"
|
|
depends on X86 && !64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_GLUE_HELPER_X86
|
|
select CRYPTO_SERPENT
|
|
select CRYPTO_SIMD
|
|
help
|
|
Serpent cipher algorithm, by Anderson, Biham & Knudsen.
|
|
|
|
Keys are allowed to be from 0 to 256 bits in length, in steps
|
|
of 8 bits.
|
|
|
|
This module provides Serpent cipher algorithm that processes four
|
|
blocks parallel using SSE2 instruction set.
|
|
|
|
See also:
|
|
<http://www.cl.cam.ac.uk/~rja14/serpent.html>
|
|
|
|
config CRYPTO_SERPENT_AVX_X86_64
|
|
tristate "Serpent cipher algorithm (x86_64/AVX)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_GLUE_HELPER_X86
|
|
select CRYPTO_SERPENT
|
|
select CRYPTO_SIMD
|
|
select CRYPTO_XTS
|
|
help
|
|
Serpent cipher algorithm, by Anderson, Biham & Knudsen.
|
|
|
|
Keys are allowed to be from 0 to 256 bits in length, in steps
|
|
of 8 bits.
|
|
|
|
This module provides the Serpent cipher algorithm that processes
|
|
eight blocks parallel using the AVX instruction set.
|
|
|
|
See also:
|
|
<http://www.cl.cam.ac.uk/~rja14/serpent.html>
|
|
|
|
config CRYPTO_SERPENT_AVX2_X86_64
|
|
tristate "Serpent cipher algorithm (x86_64/AVX2)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_SERPENT_AVX_X86_64
|
|
help
|
|
Serpent cipher algorithm, by Anderson, Biham & Knudsen.
|
|
|
|
Keys are allowed to be from 0 to 256 bits in length, in steps
|
|
of 8 bits.
|
|
|
|
This module provides Serpent cipher algorithm that processes 16
|
|
blocks parallel using AVX2 instruction set.
|
|
|
|
See also:
|
|
<http://www.cl.cam.ac.uk/~rja14/serpent.html>
|
|
|
|
config CRYPTO_SM4
|
|
tristate "SM4 cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
SM4 cipher algorithms (OSCCA GB/T 32907-2016).
|
|
|
|
SM4 (GBT.32907-2016) is a cryptographic standard issued by the
|
|
Organization of State Commercial Administration of China (OSCCA)
|
|
as an authorized cryptographic algorithms for the use within China.
|
|
|
|
SMS4 was originally created for use in protecting wireless
|
|
networks, and is mandated in the Chinese National Standard for
|
|
Wireless LAN WAPI (Wired Authentication and Privacy Infrastructure)
|
|
(GB.15629.11-2003).
|
|
|
|
The latest SM4 standard (GBT.32907-2016) was proposed by OSCCA and
|
|
standardized through TC 260 of the Standardization Administration
|
|
of the People's Republic of China (SAC).
|
|
|
|
The input, output, and key of SMS4 are each 128 bits.
|
|
|
|
See also: <https://eprint.iacr.org/2008/329.pdf>
|
|
|
|
If unsure, say N.
|
|
|
|
config CRYPTO_TEA
|
|
tristate "TEA, XTEA and XETA cipher algorithms"
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
TEA cipher algorithm.
|
|
|
|
Tiny Encryption Algorithm is a simple cipher that uses
|
|
many rounds for security. It is very fast and uses
|
|
little memory.
|
|
|
|
Xtendend Tiny Encryption Algorithm is a modification to
|
|
the TEA algorithm to address a potential key weakness
|
|
in the TEA algorithm.
|
|
|
|
Xtendend Encryption Tiny Algorithm is a mis-implementation
|
|
of the XTEA algorithm for compatibility purposes.
|
|
|
|
config CRYPTO_TWOFISH
|
|
tristate "Twofish cipher algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_TWOFISH_COMMON
|
|
help
|
|
Twofish cipher algorithm.
|
|
|
|
Twofish was submitted as an AES (Advanced Encryption Standard)
|
|
candidate cipher by researchers at CounterPane Systems. It is a
|
|
16 round block cipher supporting key sizes of 128, 192, and 256
|
|
bits.
|
|
|
|
See also:
|
|
<http://www.schneier.com/twofish.html>
|
|
|
|
config CRYPTO_TWOFISH_COMMON
|
|
tristate
|
|
help
|
|
Common parts of the Twofish cipher algorithm shared by the
|
|
generic c and the assembler implementations.
|
|
|
|
config CRYPTO_TWOFISH_586
|
|
tristate "Twofish cipher algorithms (i586)"
|
|
depends on (X86 || UML_X86) && !64BIT
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_TWOFISH_COMMON
|
|
help
|
|
Twofish cipher algorithm.
|
|
|
|
Twofish was submitted as an AES (Advanced Encryption Standard)
|
|
candidate cipher by researchers at CounterPane Systems. It is a
|
|
16 round block cipher supporting key sizes of 128, 192, and 256
|
|
bits.
|
|
|
|
See also:
|
|
<http://www.schneier.com/twofish.html>
|
|
|
|
config CRYPTO_TWOFISH_X86_64
|
|
tristate "Twofish cipher algorithm (x86_64)"
|
|
depends on (X86 || UML_X86) && 64BIT
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_TWOFISH_COMMON
|
|
help
|
|
Twofish cipher algorithm (x86_64).
|
|
|
|
Twofish was submitted as an AES (Advanced Encryption Standard)
|
|
candidate cipher by researchers at CounterPane Systems. It is a
|
|
16 round block cipher supporting key sizes of 128, 192, and 256
|
|
bits.
|
|
|
|
See also:
|
|
<http://www.schneier.com/twofish.html>
|
|
|
|
config CRYPTO_TWOFISH_X86_64_3WAY
|
|
tristate "Twofish cipher algorithm (x86_64, 3-way parallel)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_TWOFISH_COMMON
|
|
select CRYPTO_TWOFISH_X86_64
|
|
select CRYPTO_GLUE_HELPER_X86
|
|
help
|
|
Twofish cipher algorithm (x86_64, 3-way parallel).
|
|
|
|
Twofish was submitted as an AES (Advanced Encryption Standard)
|
|
candidate cipher by researchers at CounterPane Systems. It is a
|
|
16 round block cipher supporting key sizes of 128, 192, and 256
|
|
bits.
|
|
|
|
This module provides Twofish cipher algorithm that processes three
|
|
blocks parallel, utilizing resources of out-of-order CPUs better.
|
|
|
|
See also:
|
|
<http://www.schneier.com/twofish.html>
|
|
|
|
config CRYPTO_TWOFISH_AVX_X86_64
|
|
tristate "Twofish cipher algorithm (x86_64/AVX)"
|
|
depends on X86 && 64BIT
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_GLUE_HELPER_X86
|
|
select CRYPTO_SIMD
|
|
select CRYPTO_TWOFISH_COMMON
|
|
select CRYPTO_TWOFISH_X86_64
|
|
select CRYPTO_TWOFISH_X86_64_3WAY
|
|
help
|
|
Twofish cipher algorithm (x86_64/AVX).
|
|
|
|
Twofish was submitted as an AES (Advanced Encryption Standard)
|
|
candidate cipher by researchers at CounterPane Systems. It is a
|
|
16 round block cipher supporting key sizes of 128, 192, and 256
|
|
bits.
|
|
|
|
This module provides the Twofish cipher algorithm that processes
|
|
eight blocks parallel using the AVX Instruction Set.
|
|
|
|
See also:
|
|
<http://www.schneier.com/twofish.html>
|
|
|
|
comment "Compression"
|
|
|
|
config CRYPTO_DEFLATE
|
|
tristate "Deflate compression algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_ACOMP2
|
|
select ZLIB_INFLATE
|
|
select ZLIB_DEFLATE
|
|
help
|
|
This is the Deflate algorithm (RFC1951), specified for use in
|
|
IPSec with the IPCOMP protocol (RFC3173, RFC2394).
|
|
|
|
You will most probably want this if using IPSec.
|
|
|
|
config CRYPTO_LZO
|
|
tristate "LZO compression algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_ACOMP2
|
|
select LZO_COMPRESS
|
|
select LZO_DECOMPRESS
|
|
help
|
|
This is the LZO algorithm.
|
|
|
|
config CRYPTO_842
|
|
tristate "842 compression algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_ACOMP2
|
|
select 842_COMPRESS
|
|
select 842_DECOMPRESS
|
|
help
|
|
This is the 842 algorithm.
|
|
|
|
config CRYPTO_LZ4
|
|
tristate "LZ4 compression algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_ACOMP2
|
|
select LZ4_COMPRESS
|
|
select LZ4_DECOMPRESS
|
|
help
|
|
This is the LZ4 algorithm.
|
|
|
|
config CRYPTO_LZ4HC
|
|
tristate "LZ4HC compression algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_ACOMP2
|
|
select LZ4HC_COMPRESS
|
|
select LZ4_DECOMPRESS
|
|
help
|
|
This is the LZ4 high compression mode algorithm.
|
|
|
|
config CRYPTO_ZSTD
|
|
tristate "Zstd compression algorithm"
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_ACOMP2
|
|
select ZSTD_COMPRESS
|
|
select ZSTD_DECOMPRESS
|
|
help
|
|
This is the zstd algorithm.
|
|
|
|
comment "Random Number Generation"
|
|
|
|
config CRYPTO_ANSI_CPRNG
|
|
tristate "Pseudo Random Number Generation for Cryptographic modules"
|
|
select CRYPTO_AES
|
|
select CRYPTO_RNG
|
|
help
|
|
This option enables the generic pseudo random number generator
|
|
for cryptographic modules. Uses the Algorithm specified in
|
|
ANSI X9.31 A.2.4. Note that this option must be enabled if
|
|
CRYPTO_FIPS is selected
|
|
|
|
menuconfig CRYPTO_DRBG_MENU
|
|
tristate "NIST SP800-90A DRBG"
|
|
help
|
|
NIST SP800-90A compliant DRBG. In the following submenu, one or
|
|
more of the DRBG types must be selected.
|
|
|
|
if CRYPTO_DRBG_MENU
|
|
|
|
config CRYPTO_DRBG_HMAC
|
|
bool
|
|
default y
|
|
select CRYPTO_HMAC
|
|
select CRYPTO_SHA256
|
|
|
|
config CRYPTO_DRBG_HASH
|
|
bool "Enable Hash DRBG"
|
|
select CRYPTO_SHA256
|
|
help
|
|
Enable the Hash DRBG variant as defined in NIST SP800-90A.
|
|
|
|
config CRYPTO_DRBG_CTR
|
|
bool "Enable CTR DRBG"
|
|
select CRYPTO_AES
|
|
depends on CRYPTO_CTR
|
|
help
|
|
Enable the CTR DRBG variant as defined in NIST SP800-90A.
|
|
|
|
config CRYPTO_DRBG
|
|
tristate
|
|
default CRYPTO_DRBG_MENU
|
|
select CRYPTO_RNG
|
|
select CRYPTO_JITTERENTROPY
|
|
|
|
endif # if CRYPTO_DRBG_MENU
|
|
|
|
config CRYPTO_JITTERENTROPY
|
|
tristate "Jitterentropy Non-Deterministic Random Number Generator"
|
|
select CRYPTO_RNG
|
|
help
|
|
The Jitterentropy RNG is a noise that is intended
|
|
to provide seed to another RNG. The RNG does not
|
|
perform any cryptographic whitening of the generated
|
|
random numbers. This Jitterentropy RNG registers with
|
|
the kernel crypto API and can be used by any caller.
|
|
|
|
config CRYPTO_USER_API
|
|
tristate
|
|
|
|
config CRYPTO_USER_API_HASH
|
|
tristate "User-space interface for hash algorithms"
|
|
depends on NET
|
|
select CRYPTO_HASH
|
|
select CRYPTO_USER_API
|
|
help
|
|
This option enables the user-spaces interface for hash
|
|
algorithms.
|
|
|
|
config CRYPTO_USER_API_SKCIPHER
|
|
tristate "User-space interface for symmetric key cipher algorithms"
|
|
depends on NET
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_USER_API
|
|
help
|
|
This option enables the user-spaces interface for symmetric
|
|
key cipher algorithms.
|
|
|
|
config CRYPTO_USER_API_RNG
|
|
tristate "User-space interface for random number generator algorithms"
|
|
depends on NET
|
|
select CRYPTO_RNG
|
|
select CRYPTO_USER_API
|
|
help
|
|
This option enables the user-spaces interface for random
|
|
number generator algorithms.
|
|
|
|
config CRYPTO_USER_API_AEAD
|
|
tristate "User-space interface for AEAD cipher algorithms"
|
|
depends on NET
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_NULL
|
|
select CRYPTO_USER_API
|
|
help
|
|
This option enables the user-spaces interface for AEAD
|
|
cipher algorithms.
|
|
|
|
config CRYPTO_HASH_INFO
|
|
bool
|
|
|
|
source "drivers/crypto/Kconfig"
|
|
source crypto/asymmetric_keys/Kconfig
|
|
source certs/Kconfig
|
|
|
|
endif # if CRYPTO
|