Sonic Zhang d7ff1a90b2 Blackfin arch: Fix bug - KGDB single step into the middle of a 4 bytes instruction on bf561 after soft bp is hit ... Run IFLUSH twice to avoid loading wrong instruction after invalidating icache and following sequence is met. 1) The one instruction address is cached in the icache. 2) This instruction in SDRAM is changed. 3) IFLASH[P0] is executed only once in lackfin_icache_flush_range(). 4) This instruction is executed again, but not the changed new one. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>		2009-03-05 18:26:59 +08:00
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arch_checks.c	Blackfin arch: make sure people do not set the kernel load address too high	2009-03-05 17:33:36 +08:00
cache-c.c
cache.S	Blackfin arch: Fix bug - KGDB single step into the middle of a 4 bytes instruction on bf561 after soft bp is hit	2009-03-05 18:26:59 +08:00
clocks-init.c	Blackfin arch: fix bug - The SPORT_HYS bit is not set for BF561 0.5	2009-03-05 14:42:30 +08:00
cpufreq.c
dpmc.c
dpmc_modes.S
entry.S	Blackfin arch: Update adeos blackfin arch patch to 1.9-00	2009-03-04 16:52:38 +08:00
head.S	Blackfin arch: Fix bug - 561 SMP kernel can't boot from jffs2	2009-02-04 16:49:45 +08:00
interrupt.S	Blackfin arch: Update adeos blackfin arch patch to 1.9-00	2009-03-04 16:52:38 +08:00
ints-priority.c	Blackfin arch: Update adeos blackfin arch patch to 1.9-00	2009-03-04 16:52:38 +08:00
irqpanic.c
lock.S
Makefile
pm.c	Blackfin arch: base SIC_IWR# programming on whether the MMR exists	2009-02-04 16:49:45 +08:00
smp.c	Blackfin arch: fix bug - kgdb fails to continue after setting breakpoint on bf561-ezkit kernel with smp patch	2009-03-05 16:44:53 +08:00