80dc0d6b44
At boot time, determine the D-cache, I-cache and E-cache size and line-size. Use them in cache flushes when appropriate. This change was motivated by discovering that the D-cache on UltraSparc-IIIi and later are 64K not 32K, and the flushes done by the Cheetah error handlers were assuming a 32K size. There are still some pieces of code that are hard coding things and will need to be fixed up at some point. While we're here, fix the D-cache and I-cache parity error handlers to run with interrupts disabled, and when the trap occurs at trap level > 1 log the event via a counter displayed in /proc/cpuinfo. Signed-off-by: David S. Miller <davem@davemloft.net>
166 lines
3.9 KiB
C
166 lines
3.9 KiB
C
/* devices.c: Initial scan of the prom device tree for important
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* Sparc device nodes which we need to find.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/threads.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/string.h>
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#include <linux/spinlock.h>
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#include <linux/errno.h>
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#include <asm/page.h>
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#include <asm/oplib.h>
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#include <asm/system.h>
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#include <asm/smp.h>
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#include <asm/spitfire.h>
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#include <asm/timer.h>
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#include <asm/cpudata.h>
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/* Used to synchronize acceses to NatSemi SUPER I/O chip configure
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* operations in asm/ns87303.h
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*/
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DEFINE_SPINLOCK(ns87303_lock);
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extern void cpu_probe(void);
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extern void central_probe(void);
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static char *cpu_mid_prop(void)
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{
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if (tlb_type == spitfire)
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return "upa-portid";
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return "portid";
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}
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static int check_cpu_node(int nd, int *cur_inst,
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int (*compare)(int, int, void *), void *compare_arg,
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int *prom_node, int *mid)
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{
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char node_str[128];
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prom_getstring(nd, "device_type", node_str, sizeof(node_str));
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if (strcmp(node_str, "cpu"))
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return -ENODEV;
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if (!compare(nd, *cur_inst, compare_arg)) {
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if (prom_node)
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*prom_node = nd;
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if (mid)
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*mid = prom_getintdefault(nd, cpu_mid_prop(), 0);
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return 0;
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}
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(*cur_inst)++;
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return -ENODEV;
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}
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static int __cpu_find_by(int (*compare)(int, int, void *), void *compare_arg,
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int *prom_node, int *mid)
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{
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int nd, cur_inst, err;
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nd = prom_root_node;
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cur_inst = 0;
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err = check_cpu_node(nd, &cur_inst,
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compare, compare_arg,
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prom_node, mid);
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if (err == 0)
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return 0;
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nd = prom_getchild(nd);
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while ((nd = prom_getsibling(nd)) != 0) {
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err = check_cpu_node(nd, &cur_inst,
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compare, compare_arg,
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prom_node, mid);
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if (err == 0)
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return 0;
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}
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return -ENODEV;
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}
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static int cpu_instance_compare(int nd, int instance, void *_arg)
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{
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int desired_instance = (int) (long) _arg;
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if (instance == desired_instance)
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return 0;
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return -ENODEV;
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}
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int cpu_find_by_instance(int instance, int *prom_node, int *mid)
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{
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return __cpu_find_by(cpu_instance_compare, (void *)(long)instance,
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prom_node, mid);
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}
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static int cpu_mid_compare(int nd, int instance, void *_arg)
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{
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int desired_mid = (int) (long) _arg;
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int this_mid;
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this_mid = prom_getintdefault(nd, cpu_mid_prop(), 0);
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if (this_mid == desired_mid)
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return 0;
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return -ENODEV;
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}
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int cpu_find_by_mid(int mid, int *prom_node)
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{
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return __cpu_find_by(cpu_mid_compare, (void *)(long)mid,
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prom_node, NULL);
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}
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void __init device_scan(void)
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{
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/* FIX ME FAST... -DaveM */
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ioport_resource.end = 0xffffffffffffffffUL;
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prom_printf("Booting Linux...\n");
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#ifndef CONFIG_SMP
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{
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int err, cpu_node;
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err = cpu_find_by_instance(0, &cpu_node, NULL);
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if (err) {
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prom_printf("No cpu nodes, cannot continue\n");
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prom_halt();
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}
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cpu_data(0).clock_tick = prom_getintdefault(cpu_node,
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"clock-frequency",
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0);
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cpu_data(0).dcache_size = prom_getintdefault(cpu_node,
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"dcache-size",
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16 * 1024);
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cpu_data(0).dcache_line_size =
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prom_getintdefault(cpu_node, "dcache-line-size", 32);
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cpu_data(0).icache_size = prom_getintdefault(cpu_node,
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"icache-size",
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16 * 1024);
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cpu_data(0).icache_line_size =
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prom_getintdefault(cpu_node, "icache-line-size", 32);
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cpu_data(0).ecache_size = prom_getintdefault(cpu_node,
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"ecache-size",
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4 * 1024 * 1024);
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cpu_data(0).ecache_line_size =
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prom_getintdefault(cpu_node, "ecache-line-size", 64);
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printk("CPU[0]: Caches "
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"D[sz(%d):line_sz(%d)] "
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"I[sz(%d):line_sz(%d)] "
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"E[sz(%d):line_sz(%d)]\n",
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cpu_data(0).dcache_size, cpu_data(0).dcache_line_size,
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cpu_data(0).icache_size, cpu_data(0).icache_line_size,
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cpu_data(0).ecache_size, cpu_data(0).ecache_line_size);
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}
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#endif
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central_probe();
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cpu_probe();
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}
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