4efc0670ba
The 64bit machine check code is in many ways much better than the 32bit machine check code: it is more specification compliant, is cleaner, only has a single code base versus one per CPU, has better infrastructure for recovery, has a cleaner way to communicate with user space etc. etc. Use the 64bit code for 32bit too. This is the second attempt to do this. There was one a couple of years ago to unify this code for 32bit and 64bit. Back then this ran into some trouble with K7s and was reverted. I believe this time the K7 problems (and some others) are addressed. I went over the old handlers and was very careful to retain all quirks. But of course this needs a lot of testing on old systems. On newer 64bit capable systems I don't expect much problems because they have been already tested with the 64bit kernel. I made this a CONFIG for now that still allows to select the old machine check code. This is mostly to make testing easier, if someone runs into a problem we can ask them to try with the CONFIG switched. The new code is default y for more coverage. Once there is confidence the 64bit code works well on older hardware too the CONFIG_X86_OLD_MCE and the associated code can be easily removed. This causes a behaviour change for 32bit installations. They now have to install the mcelog package to be able to log corrected machine checks. The 64bit machine check code only handles CPUs which support the standard Intel machine check architecture described in the IA32 SDM. The 32bit code has special support for some older CPUs which have non standard machine check architectures, in particular WinChip C3 and Intel P5. I made those a separate CONFIG option and kept them for now. The WinChip variant could be probably removed without too much pain, it doesn't really do anything interesting. P5 is also disabled by default (like it was before) because many motherboards have it miswired, but according to Alan Cox a few embedded setups use that one. Forward ported/heavily changed version of old patch, original patch included review/fixes from Thomas Gleixner, Bert Wesarg. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
59 lines
2.2 KiB
C
59 lines
2.2 KiB
C
/*
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* This file is designed to contain the BUILD_INTERRUPT specifications for
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* all of the extra named interrupt vectors used by the architecture.
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* Usually this is the Inter Process Interrupts (IPIs)
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*/
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/*
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* The following vectors are part of the Linux architecture, there
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* is no hardware IRQ pin equivalent for them, they are triggered
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* through the ICC by us (IPIs)
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*/
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#ifdef CONFIG_SMP
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BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
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BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
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BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
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BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
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BUILD_INTERRUPT3(invalidate_interrupt0,INVALIDATE_TLB_VECTOR_START+0,
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smp_invalidate_interrupt)
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BUILD_INTERRUPT3(invalidate_interrupt1,INVALIDATE_TLB_VECTOR_START+1,
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smp_invalidate_interrupt)
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BUILD_INTERRUPT3(invalidate_interrupt2,INVALIDATE_TLB_VECTOR_START+2,
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smp_invalidate_interrupt)
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BUILD_INTERRUPT3(invalidate_interrupt3,INVALIDATE_TLB_VECTOR_START+3,
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smp_invalidate_interrupt)
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BUILD_INTERRUPT3(invalidate_interrupt4,INVALIDATE_TLB_VECTOR_START+4,
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smp_invalidate_interrupt)
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BUILD_INTERRUPT3(invalidate_interrupt5,INVALIDATE_TLB_VECTOR_START+5,
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smp_invalidate_interrupt)
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BUILD_INTERRUPT3(invalidate_interrupt6,INVALIDATE_TLB_VECTOR_START+6,
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smp_invalidate_interrupt)
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BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
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smp_invalidate_interrupt)
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#endif
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BUILD_INTERRUPT(generic_interrupt, GENERIC_INTERRUPT_VECTOR)
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/*
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* every pentium local APIC has two 'local interrupts', with a
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* soft-definable vector attached to both interrupts, one of
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* which is a timer interrupt, the other one is error counter
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* overflow. Linux uses the local APIC timer interrupt to get
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* a much simpler SMP time architecture:
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*/
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#ifdef CONFIG_X86_LOCAL_APIC
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BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
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BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
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BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
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#ifdef CONFIG_PERF_COUNTERS
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BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR)
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#endif
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#ifdef CONFIG_X86_THERMAL_VECTOR
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BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
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#endif
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#endif
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