272966c070
Under qemu there is a race between the TDxE read-and-clear and the SCxTDR write. While on hardware it can be gauranteed that the read-and-clear will happen prior to the character being written out, no such assumption can be made under emulation. As this path happens with IRQs off and the hardware itself doesn't care about the ordering, move the SCxTDR write until after the read-and-clear. Signed-off-by: Vladimir Prus <vladimir@codesourcery.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
241 lines
5.5 KiB
C
241 lines
5.5 KiB
C
/*
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* arch/sh/kernel/early_printk.c
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*
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* Copyright (C) 1999, 2000 Niibe Yutaka
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* Copyright (C) 2002 M. R. Brown
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* Copyright (C) 2004 - 2007 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/console.h>
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#include <linux/tty.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#ifdef CONFIG_SH_STANDARD_BIOS
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#include <asm/sh_bios.h>
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/*
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* Print a string through the BIOS
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*/
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static void sh_console_write(struct console *co, const char *s,
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unsigned count)
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{
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sh_bios_console_write(s, count);
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}
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/*
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* Setup initial baud/bits/parity. We do two things here:
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* - construct a cflag setting for the first rs_open()
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* - initialize the serial port
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* Return non-zero if we didn't find a serial port.
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*/
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static int __init sh_console_setup(struct console *co, char *options)
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{
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int cflag = CREAD | HUPCL | CLOCAL;
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/*
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* Now construct a cflag setting.
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* TODO: this is a totally bogus cflag, as we have
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* no idea what serial settings the BIOS is using, or
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* even if its using the serial port at all.
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*/
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cflag |= B115200 | CS8 | /*no parity*/0;
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co->cflag = cflag;
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return 0;
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}
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static struct console bios_console = {
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.name = "bios",
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.write = sh_console_write,
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.setup = sh_console_setup,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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};
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#endif
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#ifdef CONFIG_EARLY_SCIF_CONSOLE
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#include <linux/serial_core.h>
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#include "../../../drivers/serial/sh-sci.h"
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#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
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defined(CONFIG_CPU_SUBTYPE_SH7721)
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#define EPK_SCSMR_VALUE 0x000
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#define EPK_SCBRR_VALUE 0x00C
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#define EPK_FIFO_SIZE 64
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#define EPK_FIFO_BITS (0x7f00 >> 8)
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#else
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#define EPK_FIFO_SIZE 16
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#define EPK_FIFO_BITS (0x1f00 >> 8)
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#endif
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static struct uart_port scif_port = {
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.type = PORT_SCIF,
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.mapbase = CONFIG_EARLY_SCIF_CONSOLE_PORT,
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.membase = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT,
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};
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static void scif_sercon_putc(int c)
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{
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while (((sci_in(&scif_port, SCFDR) & EPK_FIFO_BITS) >= EPK_FIFO_SIZE))
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;
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sci_in(&scif_port, SCxSR);
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sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40));
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sci_out(&scif_port, SCxTDR, c);
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while ((sci_in(&scif_port, SCxSR) & 0x40) == 0)
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;
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if (c == '\n')
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scif_sercon_putc('\r');
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}
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static void scif_sercon_write(struct console *con, const char *s,
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unsigned count)
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{
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while (count-- > 0)
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scif_sercon_putc(*s++);
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}
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static int __init scif_sercon_setup(struct console *con, char *options)
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{
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con->cflag = CREAD | HUPCL | CLOCAL | B115200 | CS8;
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return 0;
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}
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static struct console scif_console = {
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.name = "sercon",
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.write = scif_sercon_write,
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.setup = scif_sercon_setup,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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};
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#if !defined(CONFIG_SH_STANDARD_BIOS)
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#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
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defined(CONFIG_CPU_SUBTYPE_SH7721)
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static void scif_sercon_init(char *s)
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{
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sci_out(&scif_port, SCSCR, 0x0000); /* clear TE and RE */
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sci_out(&scif_port, SCFCR, 0x4006); /* reset */
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sci_out(&scif_port, SCSCR, 0x0000); /* select internal clock */
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sci_out(&scif_port, SCSMR, EPK_SCSMR_VALUE);
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sci_out(&scif_port, SCBRR, EPK_SCBRR_VALUE);
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mdelay(1); /* wait 1-bit time */
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sci_out(&scif_port, SCFCR, 0x0030); /* TTRG=b'11 */
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sci_out(&scif_port, SCSCR, 0x0030); /* TE, RE */
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}
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#elif defined(CONFIG_CPU_SH4)
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#define DEFAULT_BAUD 115200
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/*
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* Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
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* devices that aren't using sh-ipl+g.
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*/
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static void scif_sercon_init(char *s)
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{
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struct uart_port *port = &scif_port;
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unsigned baud = DEFAULT_BAUD;
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unsigned int status;
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char *e;
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if (*s == ',')
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++s;
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if (*s) {
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/* ignore ioport/device name */
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s += strcspn(s, ",");
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if (*s == ',')
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s++;
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}
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if (*s) {
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baud = simple_strtoul(s, &e, 0);
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if (baud == 0 || s == e)
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baud = DEFAULT_BAUD;
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}
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do {
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status = sci_in(port, SCxSR);
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} while (!(status & SCxSR_TEND(port)));
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sci_out(port, SCSCR, 0); /* TE=0, RE=0 */
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sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
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sci_out(port, SCSMR, 0);
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/* Set baud rate */
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sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) /
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(32 * baud) - 1);
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udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
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sci_out(port, SCSPTR, 0);
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sci_out(port, SCxSR, 0x60);
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sci_out(port, SCLSR, 0);
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sci_out(port, SCFCR, 0);
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sci_out(port, SCSCR, 0x30); /* TE=1, RE=1 */
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}
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#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
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#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
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#endif /* CONFIG_EARLY_SCIF_CONSOLE */
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/*
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* Setup a default console, if more than one is compiled in, rely on the
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* earlyprintk= parsing to give priority.
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*/
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static struct console *early_console =
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#ifdef CONFIG_SH_STANDARD_BIOS
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&bios_console
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#elif defined(CONFIG_EARLY_SCIF_CONSOLE)
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&scif_console
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#else
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NULL
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#endif
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;
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static int __init setup_early_printk(char *buf)
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{
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int keep_early = 0;
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if (!buf)
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return 0;
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if (strstr(buf, "keep"))
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keep_early = 1;
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#ifdef CONFIG_SH_STANDARD_BIOS
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if (!strncmp(buf, "bios", 4))
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early_console = &bios_console;
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#endif
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#if defined(CONFIG_EARLY_SCIF_CONSOLE)
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if (!strncmp(buf, "serial", 6)) {
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early_console = &scif_console;
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#if !defined(CONFIG_SH_STANDARD_BIOS)
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#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720) || \
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defined(CONFIG_CPU_SUBTYPE_SH7721)
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scif_sercon_init(buf + 6);
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#endif
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#endif
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}
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#endif
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if (likely(early_console)) {
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if (keep_early)
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early_console->flags &= ~CON_BOOT;
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else
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early_console->flags |= CON_BOOT;
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register_console(early_console);
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}
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return 0;
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}
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early_param("earlyprintk", setup_early_printk);
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