6d803ba736
factorise some generic infrastructure to assist looking up struct clks for the ARM & SH architecture. as the code is identical at 99% put the arch specific code for allocation as example in asm/clkdev.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
233 lines
4.8 KiB
C
233 lines
4.8 KiB
C
/*
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* linux/arch/arm/mach-integrator/core.c
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*
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* Copyright (C) 2000-2003 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/memblock.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/termios.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/serial.h>
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#include <linux/io.h>
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#include <linux/clkdev.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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#include <asm/irq.h>
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#include <mach/cm.h>
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#include <asm/system.h>
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#include <asm/leds.h>
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#include <asm/mach/time.h>
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#include <asm/pgtable.h>
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static struct amba_pl010_data integrator_uart_data;
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static struct amba_device rtc_device = {
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.dev = {
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.init_name = "mb:15",
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},
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.res = {
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.start = INTEGRATOR_RTC_BASE,
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.end = INTEGRATOR_RTC_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_RTCINT, NO_IRQ },
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.periphid = 0x00041030,
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};
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static struct amba_device uart0_device = {
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.dev = {
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.init_name = "mb:16",
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.platform_data = &integrator_uart_data,
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},
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.res = {
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.start = INTEGRATOR_UART0_BASE,
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.end = INTEGRATOR_UART0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_UARTINT0, NO_IRQ },
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.periphid = 0x0041010,
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};
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static struct amba_device uart1_device = {
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.dev = {
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.init_name = "mb:17",
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.platform_data = &integrator_uart_data,
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},
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.res = {
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.start = INTEGRATOR_UART1_BASE,
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.end = INTEGRATOR_UART1_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_UARTINT1, NO_IRQ },
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.periphid = 0x0041010,
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};
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static struct amba_device kmi0_device = {
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.dev = {
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.init_name = "mb:18",
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},
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.res = {
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.start = KMI0_BASE,
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.end = KMI0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_KMIINT0, NO_IRQ },
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.periphid = 0x00041050,
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};
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static struct amba_device kmi1_device = {
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.dev = {
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.init_name = "mb:19",
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},
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.res = {
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.start = KMI1_BASE,
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.end = KMI1_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_KMIINT1, NO_IRQ },
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.periphid = 0x00041050,
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};
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static struct amba_device *amba_devs[] __initdata = {
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&rtc_device,
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&uart0_device,
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&uart1_device,
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&kmi0_device,
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&kmi1_device,
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};
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/*
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* These are fixed clocks.
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*/
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static struct clk clk24mhz = {
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.rate = 24000000,
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};
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static struct clk uartclk = {
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.rate = 14745600,
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};
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static struct clk dummy_apb_pclk;
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static struct clk_lookup lookups[] = {
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{ /* Bus clock */
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.con_id = "apb_pclk",
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.clk = &dummy_apb_pclk,
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}, { /* UART0 */
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.dev_id = "mb:16",
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.clk = &uartclk,
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}, { /* UART1 */
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.dev_id = "mb:17",
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.clk = &uartclk,
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}, { /* KMI0 */
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.dev_id = "mb:18",
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.clk = &clk24mhz,
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}, { /* KMI1 */
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.dev_id = "mb:19",
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.clk = &clk24mhz,
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}, { /* MMCI - IntegratorCP */
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.dev_id = "mb:1c",
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.clk = &uartclk,
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}
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};
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static int __init integrator_init(void)
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{
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int i;
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
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struct amba_device *d = amba_devs[i];
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amba_device_register(d, &iomem_resource);
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}
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return 0;
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}
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arch_initcall(integrator_init);
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/*
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* On the Integrator platform, the port RTS and DTR are provided by
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* bits in the following SC_CTRLS register bits:
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* RTS DTR
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* UART0 7 6
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* UART1 5 4
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*/
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#define SC_CTRLC IO_ADDRESS(INTEGRATOR_SC_CTRLC)
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#define SC_CTRLS IO_ADDRESS(INTEGRATOR_SC_CTRLS)
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static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
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{
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unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
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if (dev == &uart0_device) {
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rts_mask = 1 << 4;
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dtr_mask = 1 << 5;
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} else {
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rts_mask = 1 << 6;
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dtr_mask = 1 << 7;
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}
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if (mctrl & TIOCM_RTS)
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ctrlc |= rts_mask;
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else
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ctrls |= rts_mask;
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if (mctrl & TIOCM_DTR)
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ctrlc |= dtr_mask;
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else
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ctrls |= dtr_mask;
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__raw_writel(ctrls, SC_CTRLS);
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__raw_writel(ctrlc, SC_CTRLC);
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}
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static struct amba_pl010_data integrator_uart_data = {
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.set_mctrl = integrator_uart_set_mctrl,
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};
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#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
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static DEFINE_SPINLOCK(cm_lock);
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/**
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* cm_control - update the CM_CTRL register.
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* @mask: bits to change
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* @set: bits to set
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*/
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void cm_control(u32 mask, u32 set)
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{
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unsigned long flags;
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u32 val;
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spin_lock_irqsave(&cm_lock, flags);
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val = readl(CM_CTRL) & ~mask;
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writel(val | set, CM_CTRL);
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spin_unlock_irqrestore(&cm_lock, flags);
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}
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EXPORT_SYMBOL(cm_control);
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/*
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* We need to stop things allocating the low memory; ideally we need a
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* better implementation of GFP_DMA which does not assume that DMA-able
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* memory starts at zero.
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*/
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void __init integrator_reserve(void)
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{
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memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
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}
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