66574cc054
This patch removes all the module loader hook implementations in the architecture specific code where the functionality is the same as that now provided by the recently added default hooks. Signed-off-by: Jonas Bonn <jonas@southpole.se> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
192 lines
4.9 KiB
C
192 lines
4.9 KiB
C
/*
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* arch/xtensa/kernel/module.c
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*
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* Module support.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2006 Tensilica Inc.
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*
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* Chris Zankel <chris@zankel.net>
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*
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*/
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#include <linux/module.h>
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#include <linux/moduleloader.h>
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#include <linux/elf.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/cache.h>
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#undef DEBUG_RELOCATE
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static int
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decode_calln_opcode (unsigned char *location)
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{
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#ifdef __XTENSA_EB__
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return (location[0] & 0xf0) == 0x50;
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#endif
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#ifdef __XTENSA_EL__
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return (location[0] & 0xf) == 0x5;
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#endif
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}
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static int
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decode_l32r_opcode (unsigned char *location)
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{
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#ifdef __XTENSA_EB__
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return (location[0] & 0xf0) == 0x10;
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#endif
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#ifdef __XTENSA_EL__
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return (location[0] & 0xf) == 0x1;
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#endif
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}
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int apply_relocate_add(Elf32_Shdr *sechdrs,
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const char *strtab,
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unsigned int symindex,
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unsigned int relsec,
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struct module *mod)
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{
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unsigned int i;
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Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
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Elf32_Sym *sym;
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unsigned char *location;
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uint32_t value;
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#ifdef DEBUG_RELOCATE
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printk("Applying relocate section %u to %u\n", relsec,
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sechdrs[relsec].sh_info);
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#endif
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for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rela); i++) {
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location = (char *)sechdrs[sechdrs[relsec].sh_info].sh_addr
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+ rela[i].r_offset;
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sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
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+ ELF32_R_SYM(rela[i].r_info);
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value = sym->st_value + rela[i].r_addend;
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switch (ELF32_R_TYPE(rela[i].r_info)) {
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case R_XTENSA_NONE:
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case R_XTENSA_DIFF8:
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case R_XTENSA_DIFF16:
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case R_XTENSA_DIFF32:
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case R_XTENSA_ASM_EXPAND:
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break;
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case R_XTENSA_32:
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case R_XTENSA_PLT:
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*(uint32_t *)location += value;
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break;
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case R_XTENSA_SLOT0_OP:
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if (decode_calln_opcode(location)) {
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value -= ((unsigned long)location & -4) + 4;
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if ((value & 3) != 0 ||
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((value + (1 << 19)) >> 20) != 0) {
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printk("%s: relocation out of range, "
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"section %d reloc %d "
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"sym '%s'\n",
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mod->name, relsec, i,
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strtab + sym->st_name);
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return -ENOEXEC;
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}
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value = (signed int)value >> 2;
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#ifdef __XTENSA_EB__
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location[0] = ((location[0] & ~0x3) |
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((value >> 16) & 0x3));
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location[1] = (value >> 8) & 0xff;
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location[2] = value & 0xff;
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#endif
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#ifdef __XTENSA_EL__
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location[0] = ((location[0] & ~0xc0) |
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((value << 6) & 0xc0));
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location[1] = (value >> 2) & 0xff;
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location[2] = (value >> 10) & 0xff;
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#endif
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} else if (decode_l32r_opcode(location)) {
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value -= (((unsigned long)location + 3) & -4);
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if ((value & 3) != 0 ||
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(signed int)value >> 18 != -1) {
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printk("%s: relocation out of range, "
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"section %d reloc %d "
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"sym '%s'\n",
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mod->name, relsec, i,
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strtab + sym->st_name);
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return -ENOEXEC;
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}
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value = (signed int)value >> 2;
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#ifdef __XTENSA_EB__
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location[1] = (value >> 8) & 0xff;
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location[2] = value & 0xff;
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#endif
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#ifdef __XTENSA_EL__
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location[1] = value & 0xff;
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location[2] = (value >> 8) & 0xff;
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#endif
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}
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/* FIXME: Ignore any other opcodes. The Xtensa
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assembler currently assumes that the linker will
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always do relaxation and so all PC-relative
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operands need relocations. (The assembler also
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writes out the tentative PC-relative values,
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assuming no link-time relaxation, so it is usually
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safe to ignore the relocations.) If the
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assembler's "--no-link-relax" flag can be made to
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work, and if all kernel modules can be assembled
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with that flag, then unexpected relocations could
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be detected here. */
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break;
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case R_XTENSA_SLOT1_OP:
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case R_XTENSA_SLOT2_OP:
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case R_XTENSA_SLOT3_OP:
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case R_XTENSA_SLOT4_OP:
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case R_XTENSA_SLOT5_OP:
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case R_XTENSA_SLOT6_OP:
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case R_XTENSA_SLOT7_OP:
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case R_XTENSA_SLOT8_OP:
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case R_XTENSA_SLOT9_OP:
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case R_XTENSA_SLOT10_OP:
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case R_XTENSA_SLOT11_OP:
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case R_XTENSA_SLOT12_OP:
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case R_XTENSA_SLOT13_OP:
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case R_XTENSA_SLOT14_OP:
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printk("%s: unexpected FLIX relocation: %u\n",
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mod->name,
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ELF32_R_TYPE(rela[i].r_info));
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return -ENOEXEC;
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case R_XTENSA_SLOT0_ALT:
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case R_XTENSA_SLOT1_ALT:
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case R_XTENSA_SLOT2_ALT:
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case R_XTENSA_SLOT3_ALT:
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case R_XTENSA_SLOT4_ALT:
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case R_XTENSA_SLOT5_ALT:
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case R_XTENSA_SLOT6_ALT:
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case R_XTENSA_SLOT7_ALT:
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case R_XTENSA_SLOT8_ALT:
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case R_XTENSA_SLOT9_ALT:
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case R_XTENSA_SLOT10_ALT:
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case R_XTENSA_SLOT11_ALT:
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case R_XTENSA_SLOT12_ALT:
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case R_XTENSA_SLOT13_ALT:
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case R_XTENSA_SLOT14_ALT:
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printk("%s: unexpected ALT relocation: %u\n",
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mod->name,
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ELF32_R_TYPE(rela[i].r_info));
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return -ENOEXEC;
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default:
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printk("%s: unexpected relocation: %u\n",
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mod->name,
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ELF32_R_TYPE(rela[i].r_info));
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return -ENOEXEC;
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}
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}
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return 0;
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}
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