4bacc68766
Add a helper routine to register tx4939ide driver and use it on RBTX4939 board. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
307 lines
8 KiB
C
307 lines
8 KiB
C
/*
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* Toshiba RBTX4939 setup routines.
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* Based on linux/arch/mips/txx9/rbtx4938/setup.c,
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* and RBTX49xx patch from CELF patch archive.
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*
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* Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
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* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/platform_device.h>
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#include <linux/leds.h>
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#include <asm/reboot.h>
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#include <asm/txx9/generic.h>
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#include <asm/txx9/pci.h>
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#include <asm/txx9/rbtx4939.h>
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static void rbtx4939_machine_restart(char *command)
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{
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local_irq_disable();
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writeb(1, rbtx4939_reseten_addr);
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writeb(1, rbtx4939_softreset_addr);
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while (1)
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;
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}
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static void __init rbtx4939_time_init(void)
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{
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tx4939_time_init(0);
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}
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static void __init rbtx4939_pci_setup(void)
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{
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#ifdef CONFIG_PCI
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int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB);
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struct pci_controller *c = &txx9_primary_pcic;
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register_pci_controller(c);
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tx4939_report_pciclk();
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tx4927_pcic_setup(tx4939_pcicptr, c, extarb);
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if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) &&
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(__raw_readq(&tx4939_ccfgptr->pcfg) &
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(TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) {
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tx4939_report_pci1clk();
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/* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
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c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
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register_pci_controller(c);
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tx4927_pcic_setup(tx4939_pcic1ptr, c, 0);
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}
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tx4939_setup_pcierr_irq();
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#endif /* CONFIG_PCI */
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}
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static unsigned long long default_ebccr[] __initdata = {
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0x01c0000000007608ULL, /* 64M ROM */
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0x017f000000007049ULL, /* 1M IOC */
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0x0180000000408608ULL, /* ISA */
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0,
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};
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static void __init rbtx4939_ebusc_setup(void)
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{
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int i;
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unsigned int sp;
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/* use user-configured speed */
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sp = TX4939_EBUSC_CR(0) & 0x30;
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default_ebccr[0] |= sp;
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default_ebccr[1] |= sp;
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default_ebccr[2] |= sp;
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/* initialise by myself */
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for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) {
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if (default_ebccr[i])
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____raw_writeq(default_ebccr[i],
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&tx4939_ebuscptr->cr[i]);
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else
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____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i])
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& ~8,
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&tx4939_ebuscptr->cr[i]);
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}
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}
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static void __init rbtx4939_update_ioc_pen(void)
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{
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__u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
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__u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg);
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__u8 pe1 = readb(rbtx4939_pe1_addr);
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__u8 pe2 = readb(rbtx4939_pe2_addr);
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__u8 pe3 = readb(rbtx4939_pe3_addr);
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if (pcfg & TX4939_PCFG_ATA0MODE)
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pe1 |= RBTX4939_PE1_ATA(0);
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else
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pe1 &= ~RBTX4939_PE1_ATA(0);
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if (pcfg & TX4939_PCFG_ATA1MODE) {
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pe1 |= RBTX4939_PE1_ATA(1);
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pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1));
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} else {
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pe1 &= ~RBTX4939_PE1_ATA(1);
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if (pcfg & TX4939_PCFG_ET0MODE)
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pe1 |= RBTX4939_PE1_RMII(0);
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else
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pe1 &= ~RBTX4939_PE1_RMII(0);
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if (pcfg & TX4939_PCFG_ET1MODE)
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pe1 |= RBTX4939_PE1_RMII(1);
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else
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pe1 &= ~RBTX4939_PE1_RMII(1);
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}
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if (ccfg & TX4939_CCFG_PTSEL)
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pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
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RBTX4939_PE3_VP_S);
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else {
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__u64 vmode = pcfg &
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(TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE);
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if (vmode == 0)
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pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
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RBTX4939_PE3_VP_S);
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else if (vmode == TX4939_PCFG_VPSMODE) {
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pe3 |= RBTX4939_PE3_VP_P;
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pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S);
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} else if (vmode == TX4939_PCFG_VSSMODE) {
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pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S;
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pe3 &= ~RBTX4939_PE3_VP_P;
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} else {
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pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P;
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pe3 &= ~RBTX4939_PE3_VP_S;
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}
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}
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if (pcfg & TX4939_PCFG_SPIMODE) {
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if (pcfg & TX4939_PCFG_SIO2MODE_GPIO)
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pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0);
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else {
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if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) {
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pe2 |= RBTX4939_PE2_SIO2;
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pe2 &= ~RBTX4939_PE2_SIO0;
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} else {
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pe2 |= RBTX4939_PE2_SIO0;
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pe2 &= ~RBTX4939_PE2_SIO2;
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}
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}
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if (pcfg & TX4939_PCFG_SIO3MODE)
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pe2 |= RBTX4939_PE2_SIO3;
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else
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pe2 &= ~RBTX4939_PE2_SIO3;
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pe2 &= ~RBTX4939_PE2_SPI;
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} else {
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pe2 |= RBTX4939_PE2_SPI;
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pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 |
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RBTX4939_PE2_SIO0);
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}
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if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO)
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pe2 |= RBTX4939_PE2_GPIO;
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else
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pe2 &= ~RBTX4939_PE2_GPIO;
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writeb(pe1, rbtx4939_pe1_addr);
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writeb(pe2, rbtx4939_pe2_addr);
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writeb(pe3, rbtx4939_pe3_addr);
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}
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#define RBTX4939_MAX_7SEGLEDS 8
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#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
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static u8 led_val[RBTX4939_MAX_7SEGLEDS];
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struct rbtx4939_led_data {
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struct led_classdev cdev;
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char name[32];
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unsigned int num;
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};
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/* Use "dot" in 7seg LEDs */
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static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev,
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enum led_brightness value)
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{
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struct rbtx4939_led_data *led_dat =
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container_of(led_cdev, struct rbtx4939_led_data, cdev);
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unsigned int num = led_dat->num;
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unsigned long flags;
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local_irq_save(flags);
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led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0);
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writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4));
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local_irq_restore(flags);
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}
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static int __init rbtx4939_led_probe(struct platform_device *pdev)
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{
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struct rbtx4939_led_data *leds_data;
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int i;
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static char *default_triggers[] __initdata = {
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"heartbeat",
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"ide-disk",
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"nand-disk",
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};
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leds_data = kzalloc(sizeof(*leds_data) * RBTX4939_MAX_7SEGLEDS,
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GFP_KERNEL);
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if (!leds_data)
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return -ENOMEM;
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for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) {
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int rc;
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struct rbtx4939_led_data *led_dat = &leds_data[i];
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led_dat->num = i;
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led_dat->cdev.brightness_set = rbtx4939_led_brightness_set;
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sprintf(led_dat->name, "rbtx4939:amber:%u", i);
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led_dat->cdev.name = led_dat->name;
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if (i < ARRAY_SIZE(default_triggers))
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led_dat->cdev.default_trigger = default_triggers[i];
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rc = led_classdev_register(&pdev->dev, &led_dat->cdev);
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if (rc < 0)
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return rc;
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led_dat->cdev.brightness_set(&led_dat->cdev, 0);
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}
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return 0;
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}
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static struct platform_driver rbtx4939_led_driver = {
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.driver = {
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.name = "rbtx4939-led",
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.owner = THIS_MODULE,
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},
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};
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static void __init rbtx4939_led_setup(void)
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{
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platform_device_register_simple("rbtx4939-led", -1, NULL, 0);
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platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe);
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}
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#else
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static inline void rbtx4939_led_setup(void)
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{
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}
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#endif
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static void __init rbtx4939_arch_init(void)
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{
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rbtx4939_pci_setup();
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}
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static void __init rbtx4939_device_init(void)
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{
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#if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE)
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int i, j;
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unsigned char ethaddr[2][6];
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for (i = 0; i < 2; i++) {
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unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10);
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if (readb(rbtx4939_bdipsw_addr) & 8) {
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u16 buf[3];
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area -= 0x03000000;
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for (j = 0; j < 3; j++)
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buf[j] = le16_to_cpup((u16 *)(area + j * 2));
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memcpy(ethaddr[i], buf, 6);
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} else
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memcpy(ethaddr[i], (void *)area, 6);
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}
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tx4939_ethaddr_init(ethaddr[0], ethaddr[1]);
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#endif
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rbtx4939_led_setup();
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tx4939_wdt_init();
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tx4939_ata_init();
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}
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static void __init rbtx4939_setup(void)
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{
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rbtx4939_ebusc_setup();
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/* always enable ATA0 */
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txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE);
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rbtx4939_update_ioc_pen();
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if (txx9_master_clock == 0)
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txx9_master_clock = 20000000;
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tx4939_setup();
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_machine_restart = rbtx4939_machine_restart;
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pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
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readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr),
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readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr));
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#ifdef CONFIG_PCI
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txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
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txx9_board_pcibios_setup = tx4927_pcibios_setup;
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#else
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set_io_port_base(RBTX4939_ETHER_BASE);
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#endif
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tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0);
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}
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struct txx9_board_vec rbtx4939_vec __initdata = {
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.system = "Tothiba RBTX4939",
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.prom_init = rbtx4939_prom_init,
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.mem_setup = rbtx4939_setup,
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.irq_setup = rbtx4939_irq_setup,
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.time_init = rbtx4939_time_init,
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.device_init = rbtx4939_device_init,
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.arch_init = rbtx4939_arch_init,
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#ifdef CONFIG_PCI
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.pci_map_irq = tx4939_pci_map_irq,
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#endif
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};
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