8be0628923
Implement SMP global cache flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
105 lines
2.9 KiB
C
105 lines
2.9 KiB
C
/* SMP global caching code
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*
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* Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/mman.h>
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#include <linux/threads.h>
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#include <linux/interrupt.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <asm/smp.h>
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#include "cache-smp.h"
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DEFINE_SPINLOCK(smp_cache_lock);
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static unsigned long smp_cache_mask;
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static unsigned long smp_cache_start;
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static unsigned long smp_cache_end;
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static cpumask_t smp_cache_ipi_map; /* Bitmask of cache IPI done CPUs */
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/**
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* smp_cache_interrupt - Handle IPI request to flush caches.
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*
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* Handle a request delivered by IPI to flush the current CPU's
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* caches. The parameters are stored in smp_cache_*.
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*/
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void smp_cache_interrupt(void)
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{
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unsigned long opr_mask = smp_cache_mask;
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switch ((enum smp_dcache_ops)(opr_mask & SMP_DCACHE_OP_MASK)) {
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case SMP_DCACHE_NOP:
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break;
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case SMP_DCACHE_INV:
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mn10300_local_dcache_inv();
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break;
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case SMP_DCACHE_INV_RANGE:
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mn10300_local_dcache_inv_range(smp_cache_start, smp_cache_end);
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break;
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case SMP_DCACHE_FLUSH:
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mn10300_local_dcache_flush();
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break;
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case SMP_DCACHE_FLUSH_RANGE:
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mn10300_local_dcache_flush_range(smp_cache_start,
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smp_cache_end);
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break;
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case SMP_DCACHE_FLUSH_INV:
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mn10300_local_dcache_flush_inv();
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break;
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case SMP_DCACHE_FLUSH_INV_RANGE:
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mn10300_local_dcache_flush_inv_range(smp_cache_start,
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smp_cache_end);
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break;
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}
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switch ((enum smp_icache_ops)(opr_mask & SMP_ICACHE_OP_MASK)) {
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case SMP_ICACHE_NOP:
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break;
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case SMP_ICACHE_INV:
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mn10300_local_icache_inv();
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break;
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case SMP_ICACHE_INV_RANGE:
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mn10300_local_icache_inv_range(smp_cache_start, smp_cache_end);
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break;
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}
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cpu_clear(smp_processor_id(), smp_cache_ipi_map);
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}
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/**
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* smp_cache_call - Issue an IPI to request the other CPUs flush caches
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* @opr_mask: Cache operation flags
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* @start: Start address of request
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* @end: End address of request
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*
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* Send cache flush IPI to other CPUs. This invokes smp_cache_interrupt()
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* above on those other CPUs and then waits for them to finish.
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*
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* The caller must hold smp_cache_lock.
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*/
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void smp_cache_call(unsigned long opr_mask,
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unsigned long start, unsigned long end)
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{
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smp_cache_mask = opr_mask;
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smp_cache_start = start;
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smp_cache_end = end;
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smp_cache_ipi_map = cpu_online_map;
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cpu_clear(smp_processor_id(), smp_cache_ipi_map);
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send_IPI_allbutself(FLUSH_CACHE_IPI);
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while (!cpus_empty(smp_cache_ipi_map))
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/* nothing. lockup detection does not belong here */
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mb();
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}
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