673b189a2e
This uses feature sections to arrange that we always use HSPRG1 as the scratch register in the interrupt entry code rather than SPRG2 when we're running in hypervisor mode on POWER7. This will ensure that we don't trash the guest's SPRG2 when we are running KVM guests. To simplify the code, we define GET_SCRATCH0() and SET_SCRATCH0() macros like the GET_PACA/SET_PACA macros. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
260 lines
6.7 KiB
ArmAsm
260 lines
6.7 KiB
ArmAsm
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright SUSE Linux Products GmbH 2009
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*
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#include <asm/ppc_asm.h>
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#include <asm/kvm_asm.h>
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#include <asm/reg.h>
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#include <asm/page.h>
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#include <asm/asm-offsets.h>
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#ifdef CONFIG_PPC_BOOK3S_64
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#include <asm/exception-64s.h>
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#endif
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/*****************************************************************************
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* *
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* Real Mode handlers that need to be in low physical memory *
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* *
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****************************************************************************/
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#if defined(CONFIG_PPC_BOOK3S_64)
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#define LOAD_SHADOW_VCPU(reg) GET_PACA(reg)
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#define SHADOW_VCPU_OFF PACA_KVM_SVCPU
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#define MSR_NOIRQ MSR_KERNEL & ~(MSR_IR | MSR_DR)
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#define FUNC(name) GLUE(.,name)
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#elif defined(CONFIG_PPC_BOOK3S_32)
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#define LOAD_SHADOW_VCPU(reg) \
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mfspr reg, SPRN_SPRG_THREAD; \
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lwz reg, THREAD_KVM_SVCPU(reg); \
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/* PPC32 can have a NULL pointer - let's check for that */ \
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mtspr SPRN_SPRG_SCRATCH1, r12; /* Save r12 */ \
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mfcr r12; \
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cmpwi reg, 0; \
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bne 1f; \
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mfspr reg, SPRN_SPRG_SCRATCH0; \
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mtcr r12; \
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mfspr r12, SPRN_SPRG_SCRATCH1; \
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b kvmppc_resume_\intno; \
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1:; \
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mtcr r12; \
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mfspr r12, SPRN_SPRG_SCRATCH1; \
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tophys(reg, reg)
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#define SHADOW_VCPU_OFF 0
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#define MSR_NOIRQ MSR_KERNEL
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#define FUNC(name) name
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#endif
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.macro INTERRUPT_TRAMPOLINE intno
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.global kvmppc_trampoline_\intno
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kvmppc_trampoline_\intno:
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SET_SCRATCH0(r13) /* Save r13 */
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/*
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* First thing to do is to find out if we're coming
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* from a KVM guest or a Linux process.
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*
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* To distinguish, we check a magic byte in the PACA/current
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*/
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LOAD_SHADOW_VCPU(r13)
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PPC_STL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
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mfcr r12
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stw r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
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lbz r12, (SHADOW_VCPU_OFF + SVCPU_IN_GUEST)(r13)
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cmpwi r12, KVM_GUEST_MODE_NONE
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bne ..kvmppc_handler_hasmagic_\intno
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/* No KVM guest? Then jump back to the Linux handler! */
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lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
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mtcr r12
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PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
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GET_SCRATCH0(r13) /* r13 = original r13 */
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b kvmppc_resume_\intno /* Get back original handler */
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/* Now we know we're handling a KVM guest */
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..kvmppc_handler_hasmagic_\intno:
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/* Should we just skip the faulting instruction? */
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cmpwi r12, KVM_GUEST_MODE_SKIP
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beq kvmppc_handler_skip_ins
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/* Let's store which interrupt we're handling */
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li r12, \intno
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/* Jump into the SLB exit code that goes to the highmem handler */
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b kvmppc_handler_trampoline_exit
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.endm
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSTEM_RESET
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_MACHINE_CHECK
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_STORAGE
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_STORAGE
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_EXTERNAL
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_EXTERNAL_HV
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALIGNMENT
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PROGRAM
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_FP_UNAVAIL
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DECREMENTER
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSCALL
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_TRACE
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PERFMON
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALTIVEC
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/* Those are only available on 64 bit machines */
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#ifdef CONFIG_PPC_BOOK3S_64
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_SEGMENT
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_SEGMENT
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INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_VSX
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#endif
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/*
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* Bring us back to the faulting code, but skip the
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* faulting instruction.
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*
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* This is a generic exit path from the interrupt
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* trampolines above.
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*
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* Input Registers:
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*
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* R12 = free
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* R13 = Shadow VCPU (PACA)
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* SVCPU.SCRATCH0 = guest R12
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* SVCPU.SCRATCH1 = guest CR
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* SPRG_SCRATCH0 = guest R13
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*
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*/
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kvmppc_handler_skip_ins:
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/* Patch the IP to the next instruction */
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mfsrr0 r12
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addi r12, r12, 4
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mtsrr0 r12
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/* Clean up all state */
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lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
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mtcr r12
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PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
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GET_SCRATCH0(r13)
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/* And get back into the code */
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RFI
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/*
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* This trampoline brings us back to a real mode handler
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*
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* Input Registers:
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*
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* R5 = SRR0
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* R6 = SRR1
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* LR = real-mode IP
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*
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*/
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.global kvmppc_handler_lowmem_trampoline
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kvmppc_handler_lowmem_trampoline:
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mtsrr0 r5
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mtsrr1 r6
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blr
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kvmppc_handler_lowmem_trampoline_end:
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/*
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* Call a function in real mode
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*
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* Input Registers:
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*
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* R3 = function
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* R4 = MSR
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* R5 = scratch register
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*
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*/
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_GLOBAL(kvmppc_rmcall)
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LOAD_REG_IMMEDIATE(r5, MSR_NOIRQ)
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mtmsr r5 /* Disable relocation and interrupts, so mtsrr
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doesn't get interrupted */
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sync
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mtsrr0 r3
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mtsrr1 r4
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RFI
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#if defined(CONFIG_PPC_BOOK3S_32)
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#define STACK_LR INT_FRAME_SIZE+4
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/* load_up_xxx have to run with MSR_DR=0 on Book3S_32 */
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#define MSR_EXT_START \
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PPC_STL r20, _NIP(r1); \
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mfmsr r20; \
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LOAD_REG_IMMEDIATE(r3, MSR_DR|MSR_EE); \
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andc r3,r20,r3; /* Disable DR,EE */ \
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mtmsr r3; \
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sync
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#define MSR_EXT_END \
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mtmsr r20; /* Enable DR,EE */ \
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sync; \
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PPC_LL r20, _NIP(r1)
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#elif defined(CONFIG_PPC_BOOK3S_64)
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#define STACK_LR _LINK
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#define MSR_EXT_START
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#define MSR_EXT_END
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#endif
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/*
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* Activate current's external feature (FPU/Altivec/VSX)
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*/
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#define define_load_up(what) \
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\
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_GLOBAL(kvmppc_load_up_ ## what); \
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PPC_STLU r1, -INT_FRAME_SIZE(r1); \
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mflr r3; \
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PPC_STL r3, STACK_LR(r1); \
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MSR_EXT_START; \
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\
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bl FUNC(load_up_ ## what); \
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\
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MSR_EXT_END; \
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PPC_LL r3, STACK_LR(r1); \
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mtlr r3; \
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addi r1, r1, INT_FRAME_SIZE; \
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blr
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define_load_up(fpu)
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#ifdef CONFIG_ALTIVEC
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define_load_up(altivec)
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#endif
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#ifdef CONFIG_VSX
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define_load_up(vsx)
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#endif
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.global kvmppc_trampoline_lowmem
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kvmppc_trampoline_lowmem:
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PPC_LONG kvmppc_handler_lowmem_trampoline - CONFIG_KERNEL_START
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.global kvmppc_trampoline_enter
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kvmppc_trampoline_enter:
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PPC_LONG kvmppc_handler_trampoline_enter - CONFIG_KERNEL_START
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#include "book3s_segment.S"
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