4692a1450b
Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
550 lines
13 KiB
C
550 lines
13 KiB
C
/*
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* Copyright 2002 Andi Kleen, SuSE Labs.
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* Thanks to Ben LaHaise for precious feedback.
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*/
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#include <linux/highmem.h>
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#include <linux/bootmem.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <asm/e820.h>
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#include <asm/processor.h>
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#include <asm/tlbflush.h>
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#include <asm/sections.h>
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#include <asm/uaccess.h>
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#include <asm/pgalloc.h>
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static inline int
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within(unsigned long addr, unsigned long start, unsigned long end)
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{
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return addr >= start && addr < end;
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}
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/*
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* Flushing functions
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*/
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void clflush_cache_range(void *addr, int size)
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{
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int i;
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for (i = 0; i < size; i += boot_cpu_data.x86_clflush_size)
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clflush(addr+i);
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}
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static void flush_kernel_map(void *arg)
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{
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/*
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* Flush all to work around Errata in early athlons regarding
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* large page flushing.
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*/
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__flush_tlb_all();
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if (boot_cpu_data.x86_model >= 4)
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wbinvd();
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}
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static void global_flush_tlb(void)
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{
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BUG_ON(irqs_disabled());
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on_each_cpu(flush_kernel_map, NULL, 1, 1);
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}
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/*
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* Certain areas of memory on x86 require very specific protection flags,
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* for example the BIOS area or kernel text. Callers don't always get this
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* right (again, ioremap() on BIOS memory is not uncommon) so this function
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* checks and fixes these known static required protection bits.
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*/
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static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
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{
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pgprot_t forbidden = __pgprot(0);
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/*
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* The BIOS area between 640k and 1Mb needs to be executable for
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* PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
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*/
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if (within(__pa(address), BIOS_BEGIN, BIOS_END))
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pgprot_val(forbidden) |= _PAGE_NX;
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/*
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* The kernel text needs to be executable for obvious reasons
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* Does not cover __inittext since that is gone later on
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*/
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if (within(address, (unsigned long)_text, (unsigned long)_etext))
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pgprot_val(forbidden) |= _PAGE_NX;
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#ifdef CONFIG_DEBUG_RODATA
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/* The .rodata section needs to be read-only */
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if (within(address, (unsigned long)__start_rodata,
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(unsigned long)__end_rodata))
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pgprot_val(forbidden) |= _PAGE_RW;
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#endif
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prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
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return prot;
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}
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pte_t *lookup_address(unsigned long address, int *level)
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{
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pgd_t *pgd = pgd_offset_k(address);
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pud_t *pud;
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pmd_t *pmd;
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*level = PG_LEVEL_NONE;
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if (pgd_none(*pgd))
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return NULL;
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pud = pud_offset(pgd, address);
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if (pud_none(*pud))
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return NULL;
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pmd = pmd_offset(pud, address);
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if (pmd_none(*pmd))
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return NULL;
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*level = PG_LEVEL_2M;
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if (pmd_large(*pmd))
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return (pte_t *)pmd;
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*level = PG_LEVEL_4K;
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return pte_offset_kernel(pmd, address);
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}
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static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
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{
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/* change init_mm */
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set_pte_atomic(kpte, pte);
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#ifdef CONFIG_X86_32
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if (!SHARED_KERNEL_PMD) {
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struct page *page;
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for (page = pgd_list; page; page = (struct page *)page->index) {
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pgd = (pgd_t *)page_address(page) + pgd_index(address);
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pud = pud_offset(pgd, address);
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pmd = pmd_offset(pud, address);
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set_pte_atomic((pte_t *)pmd, pte);
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}
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}
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#endif
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}
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static int split_large_page(pte_t *kpte, unsigned long address)
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{
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pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
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gfp_t gfp_flags = GFP_KERNEL;
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unsigned long flags;
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unsigned long addr;
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pte_t *pbase, *tmp;
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struct page *base;
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int i, level;
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#ifdef CONFIG_DEBUG_PAGEALLOC
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gfp_flags = GFP_ATOMIC;
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#endif
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base = alloc_pages(gfp_flags, 0);
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if (!base)
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return -ENOMEM;
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spin_lock_irqsave(&pgd_lock, flags);
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/*
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* Check for races, another CPU might have split this page
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* up for us already:
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*/
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tmp = lookup_address(address, &level);
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if (tmp != kpte) {
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WARN_ON_ONCE(1);
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goto out_unlock;
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}
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address = __pa(address);
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addr = address & LARGE_PAGE_MASK;
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pbase = (pte_t *)page_address(base);
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#ifdef CONFIG_X86_32
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paravirt_alloc_pt(&init_mm, page_to_pfn(base));
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#endif
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for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE)
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set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT, ref_prot));
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/*
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* Install the new, split up pagetable. Important detail here:
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*
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* On Intel the NX bit of all levels must be cleared to make a
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* page executable. See section 4.13.2 of Intel 64 and IA-32
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* Architectures Software Developer's Manual).
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*/
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ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
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__set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
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base = NULL;
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out_unlock:
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spin_unlock_irqrestore(&pgd_lock, flags);
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if (base)
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__free_pages(base, 0);
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return 0;
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}
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static int
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__change_page_attr(unsigned long address, unsigned long pfn, pgprot_t prot)
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{
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struct page *kpte_page;
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int level, err = 0;
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pte_t *kpte;
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#ifdef CONFIG_X86_32
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BUG_ON(pfn > max_low_pfn);
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#endif
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repeat:
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kpte = lookup_address(address, &level);
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if (!kpte)
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return -EINVAL;
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kpte_page = virt_to_page(kpte);
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BUG_ON(PageLRU(kpte_page));
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BUG_ON(PageCompound(kpte_page));
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prot = static_protections(prot, address);
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if (level == PG_LEVEL_4K) {
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WARN_ON_ONCE(pgprot_val(prot) & _PAGE_PSE);
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set_pte_atomic(kpte, pfn_pte(pfn, canon_pgprot(prot)));
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} else {
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/* Clear the PSE bit for the 4k level pages ! */
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pgprot_val(prot) = pgprot_val(prot) & ~_PAGE_PSE;
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err = split_large_page(kpte, address);
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if (!err)
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goto repeat;
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}
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return err;
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}
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/**
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* change_page_attr_addr - Change page table attributes in linear mapping
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* @address: Virtual address in linear mapping.
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* @prot: New page table attribute (PAGE_*)
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*
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* Change page attributes of a page in the direct mapping. This is a variant
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* of change_page_attr() that also works on memory holes that do not have
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* mem_map entry (pfn_valid() is false).
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*
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* See change_page_attr() documentation for more details.
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*
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* Modules and drivers should use the set_memory_* APIs instead.
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*/
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static int change_page_attr_addr(unsigned long address, pgprot_t prot)
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{
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int err = 0, kernel_map = 0;
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unsigned long pfn = __pa(address) >> PAGE_SHIFT;
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#ifdef CONFIG_X86_64
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if (address >= __START_KERNEL_map &&
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address < __START_KERNEL_map + KERNEL_TEXT_SIZE) {
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address = (unsigned long)__va(__pa(address));
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kernel_map = 1;
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}
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#endif
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if (!kernel_map || pte_present(pfn_pte(0, prot))) {
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err = __change_page_attr(address, pfn, prot);
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if (err)
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return err;
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}
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#ifdef CONFIG_X86_64
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/*
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* Handle kernel mapping too which aliases part of
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* lowmem:
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*/
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if (__pa(address) < KERNEL_TEXT_SIZE) {
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unsigned long addr2;
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pgprot_t prot2;
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addr2 = __START_KERNEL_map + __pa(address);
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/* Make sure the kernel mappings stay executable */
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prot2 = pte_pgprot(pte_mkexec(pfn_pte(0, prot)));
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err = __change_page_attr(addr2, pfn, prot2);
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}
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#endif
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return err;
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}
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/**
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* change_page_attr_set - Change page table attributes in the linear mapping.
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* @addr: Virtual address in linear mapping.
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* @numpages: Number of pages to change
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* @prot: Protection/caching type bits to set (PAGE_*)
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*
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* Returns 0 on success, otherwise a negated errno.
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*
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* This should be used when a page is mapped with a different caching policy
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* than write-back somewhere - some CPUs do not like it when mappings with
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* different caching policies exist. This changes the page attributes of the
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* in kernel linear mapping too.
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*
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* The caller needs to ensure that there are no conflicting mappings elsewhere
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* (e.g. in user space) * This function only deals with the kernel linear map.
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*
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* This function is different from change_page_attr() in that only selected bits
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* are impacted, all other bits remain as is.
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*/
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static int change_page_attr_set(unsigned long addr, int numpages,
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pgprot_t prot)
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{
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pgprot_t current_prot, new_prot;
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int level;
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pte_t *pte;
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int i, ret;
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for (i = 0; i < numpages ; i++) {
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pte = lookup_address(addr, &level);
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if (pte)
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current_prot = pte_pgprot(*pte);
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else
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pgprot_val(current_prot) = 0;
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pgprot_val(new_prot) =
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pgprot_val(current_prot) | pgprot_val(prot);
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ret = change_page_attr_addr(addr, new_prot);
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if (ret)
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return ret;
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addr += PAGE_SIZE;
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}
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return 0;
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}
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/**
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* change_page_attr_clear - Change page table attributes in the linear mapping.
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* @addr: Virtual address in linear mapping.
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* @numpages: Number of pages to change
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* @prot: Protection/caching type bits to clear (PAGE_*)
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*
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* Returns 0 on success, otherwise a negated errno.
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*
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* This should be used when a page is mapped with a different caching policy
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* than write-back somewhere - some CPUs do not like it when mappings with
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* different caching policies exist. This changes the page attributes of the
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* in kernel linear mapping too.
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*
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* The caller needs to ensure that there are no conflicting mappings elsewhere
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* (e.g. in user space) * This function only deals with the kernel linear map.
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*
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* This function is different from change_page_attr() in that only selected bits
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* are impacted, all other bits remain as is.
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*/
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static int change_page_attr_clear(unsigned long addr, int numpages,
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pgprot_t prot)
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{
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pgprot_t current_prot, new_prot;
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int level;
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pte_t *pte;
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int i, ret;
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for (i = 0; i < numpages; i++) {
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pte = lookup_address(addr, &level);
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if (pte)
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current_prot = pte_pgprot(*pte);
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else
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pgprot_val(current_prot) = 0;
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pgprot_val(new_prot) =
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pgprot_val(current_prot) & ~pgprot_val(prot);
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ret = change_page_attr_addr(addr, new_prot);
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if (ret)
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return ret;
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addr += PAGE_SIZE;
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}
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return 0;
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}
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int set_memory_uc(unsigned long addr, int numpages)
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{
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int err;
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err = change_page_attr_set(addr, numpages,
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__pgprot(_PAGE_PCD | _PAGE_PWT));
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global_flush_tlb();
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return err;
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}
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EXPORT_SYMBOL(set_memory_uc);
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int set_memory_wb(unsigned long addr, int numpages)
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{
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int err;
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err = change_page_attr_clear(addr, numpages,
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__pgprot(_PAGE_PCD | _PAGE_PWT));
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global_flush_tlb();
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return err;
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}
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EXPORT_SYMBOL(set_memory_wb);
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int set_memory_x(unsigned long addr, int numpages)
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{
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int err;
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err = change_page_attr_clear(addr, numpages,
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__pgprot(_PAGE_NX));
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global_flush_tlb();
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return err;
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}
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EXPORT_SYMBOL(set_memory_x);
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int set_memory_nx(unsigned long addr, int numpages)
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{
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int err;
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err = change_page_attr_set(addr, numpages,
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__pgprot(_PAGE_NX));
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global_flush_tlb();
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return err;
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}
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EXPORT_SYMBOL(set_memory_nx);
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int set_memory_ro(unsigned long addr, int numpages)
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{
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int err;
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err = change_page_attr_clear(addr, numpages,
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__pgprot(_PAGE_RW));
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global_flush_tlb();
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return err;
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}
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int set_memory_rw(unsigned long addr, int numpages)
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{
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int err;
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err = change_page_attr_set(addr, numpages,
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__pgprot(_PAGE_RW));
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global_flush_tlb();
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return err;
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}
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int set_memory_np(unsigned long addr, int numpages)
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{
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int err;
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err = change_page_attr_clear(addr, numpages,
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__pgprot(_PAGE_PRESENT));
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global_flush_tlb();
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return err;
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}
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int set_pages_uc(struct page *page, int numpages)
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{
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unsigned long addr = (unsigned long)page_address(page);
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return set_memory_uc(addr, numpages);
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}
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EXPORT_SYMBOL(set_pages_uc);
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int set_pages_wb(struct page *page, int numpages)
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{
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unsigned long addr = (unsigned long)page_address(page);
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return set_memory_wb(addr, numpages);
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}
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EXPORT_SYMBOL(set_pages_wb);
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int set_pages_x(struct page *page, int numpages)
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{
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unsigned long addr = (unsigned long)page_address(page);
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return set_memory_x(addr, numpages);
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}
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EXPORT_SYMBOL(set_pages_x);
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int set_pages_nx(struct page *page, int numpages)
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{
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unsigned long addr = (unsigned long)page_address(page);
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return set_memory_nx(addr, numpages);
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}
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EXPORT_SYMBOL(set_pages_nx);
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int set_pages_ro(struct page *page, int numpages)
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{
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unsigned long addr = (unsigned long)page_address(page);
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return set_memory_ro(addr, numpages);
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}
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int set_pages_rw(struct page *page, int numpages)
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{
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unsigned long addr = (unsigned long)page_address(page);
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return set_memory_rw(addr, numpages);
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}
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#ifdef CONFIG_DEBUG_PAGEALLOC
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static int __set_pages_p(struct page *page, int numpages)
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{
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unsigned long addr = (unsigned long)page_address(page);
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return change_page_attr_set(addr, numpages,
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__pgprot(_PAGE_PRESENT | _PAGE_RW));
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}
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static int __set_pages_np(struct page *page, int numpages)
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{
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unsigned long addr = (unsigned long)page_address(page);
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return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
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}
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void kernel_map_pages(struct page *page, int numpages, int enable)
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{
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if (PageHighMem(page))
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return;
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if (!enable) {
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debug_check_no_locks_freed(page_address(page),
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numpages * PAGE_SIZE);
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}
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/*
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* If page allocator is not up yet then do not call c_p_a():
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*/
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if (!debug_pagealloc_enabled)
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return;
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/*
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* The return value is ignored - the calls cannot fail,
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* large pages are disabled at boot time:
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*/
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if (enable)
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__set_pages_p(page, numpages);
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else
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__set_pages_np(page, numpages);
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/*
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* We should perform an IPI and flush all tlbs,
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* but that can deadlock->flush only current cpu:
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*/
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__flush_tlb_all();
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}
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#endif
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/*
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* The testcases use internal knowledge of the implementation that shouldn't
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* be exposed to the rest of the kernel. Include these directly here.
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*/
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#ifdef CONFIG_CPA_DEBUG
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#include "pageattr-test.c"
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#endif
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