0cd61b68c3
Untested, but this should fix up the bulk of the totally mechanical issues, and should make the actual detail fixing easier. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
64 lines
1.5 KiB
C
64 lines
1.5 KiB
C
/*
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* linux/arch/arm/mach-h720x/cpu-h7201.c
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*
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* Copyright (C) 2003 Thomas Gleixner <tglx@linutronix.de>
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* 2003 Robert Schwebel <r.schwebel@pengutronix.de>
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* 2004 Sascha Hauer <s.hauer@pengutronix.de>
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*
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* processor specific stuff for the Hynix h7201
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <asm/types.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/arch/irqs.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#include "common.h"
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/*
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* Timer interrupt handler
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*/
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static irqreturn_t
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h7201_timer_interrupt(int irq, void *dev_id)
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{
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write_seqlock(&xtime_lock);
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CPU_REG (TIMER_VIRT, TIMER_TOPSTAT);
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timer_tick();
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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static struct irqaction h7201_timer_irq = {
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.name = "h7201 Timer Tick",
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.flags = IRQF_DISABLED | IRQF_TIMER,
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.handler = h7201_timer_interrupt,
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};
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/*
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* Setup TIMER0 as system timer
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*/
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void __init h7201_init_time(void)
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{
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CPU_REG (TIMER_VIRT, TM0_PERIOD) = LATCH;
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CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_RESET;
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CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_REPEAT | TM_START;
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CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) = ENABLE_TM0_INTR | TIMER_ENABLE_BIT;
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setup_irq(IRQ_TIMER0, &h7201_timer_irq);
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}
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struct sys_timer h7201_timer = {
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.init = h7201_init_time,
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.offset = h720x_gettimeoffset,
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};
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