b0f3ae03ac
This splits out the uncached mapping support under its own config option, presently only used by 29-bit mode and 32-bit + PMB. This will make it possible to optionally add an uncached mapping on sh64 as well as booting without an uncached mapping for 32-bit. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
#ifndef __ASM_SH_SYSTEM_64_H
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#define __ASM_SH_SYSTEM_64_H
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/*
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* include/asm-sh/system_64.h
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 Paul Mundt
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* Copyright (C) 2004 Richard Curnow
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <cpu/registers.h>
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#include <asm/processor.h>
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/*
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* switch_to() should switch tasks to task nr n, first
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*/
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struct thread_struct;
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struct task_struct *sh64_switch_to(struct task_struct *prev,
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struct thread_struct *prev_thread,
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struct task_struct *next,
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struct thread_struct *next_thread);
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#define switch_to(prev,next,last) \
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do { \
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if (last_task_used_math != next) { \
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struct pt_regs *regs = next->thread.uregs; \
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if (regs) regs->sr |= SR_FD; \
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} \
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last = sh64_switch_to(prev, &prev->thread, next, \
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&next->thread); \
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} while (0)
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#define jump_to_uncached() do { } while (0)
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#define back_to_cached() do { } while (0)
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#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
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#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
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#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
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#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr))
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static inline reg_size_t register_align(void *val)
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{
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return (unsigned long long)(signed long long)(signed long)val;
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}
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extern void phys_stext(void);
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static inline void trigger_address_error(void)
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{
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phys_stext();
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}
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#define SR_BL_LL 0x0000000010000000LL
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static inline void set_bl_bit(void)
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{
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unsigned long long __dummy0, __dummy1 = SR_BL_LL;
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__asm__ __volatile__("getcon " __SR ", %0\n\t"
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"or %0, %1, %0\n\t"
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"putcon %0, " __SR "\n\t"
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: "=&r" (__dummy0)
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: "r" (__dummy1));
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}
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static inline void clear_bl_bit(void)
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{
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unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
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__asm__ __volatile__("getcon " __SR ", %0\n\t"
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"and %0, %1, %0\n\t"
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"putcon %0, " __SR "\n\t"
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: "=&r" (__dummy0)
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: "r" (__dummy1));
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}
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#endif /* __ASM_SH_SYSTEM_64_H */
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