43f98747d4
device_create() is race-prone, so use the race-free device_create_drvdata() instead as device_create() is going away. Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
613 lines
16 KiB
C
613 lines
16 KiB
C
/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) 2001, 2002, 2003 Broadcom Corporation
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* Copyright (C) 2007 Ralf Baechle <ralf@linux-mips.org>
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* Copyright (C) 2007 MIPS Technologies, Inc.
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#undef DEBUG
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/smp_lock.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <linux/errno.h>
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#include <linux/wait.h>
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#include <asm/io.h>
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#include <asm/sibyte/sb1250.h>
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#include <asm/sibyte/bcm1480_regs.h>
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#include <asm/sibyte/bcm1480_scd.h>
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#include <asm/sibyte/bcm1480_int.h>
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#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_scd.h>
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#include <asm/sibyte/sb1250_int.h>
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#else
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#error invalid SiByte UART configuation
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#endif
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#undef K_INT_TRACE_FREEZE
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#define K_INT_TRACE_FREEZE K_BCM1480_INT_TRACE_FREEZE
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#undef K_INT_PERF_CNT
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#define K_INT_PERF_CNT K_BCM1480_INT_PERF_CNT
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#endif
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#define SBPROF_TB_MAJOR 240
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typedef u64 tb_sample_t[6*256];
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enum open_status {
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SB_CLOSED,
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SB_OPENING,
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SB_OPEN
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};
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struct sbprof_tb {
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wait_queue_head_t tb_sync;
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wait_queue_head_t tb_read;
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struct mutex lock;
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enum open_status open;
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tb_sample_t *sbprof_tbbuf;
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int next_tb_sample;
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volatile int tb_enable;
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volatile int tb_armed;
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};
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static struct sbprof_tb sbp;
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#define MAX_SAMPLE_BYTES (24*1024*1024)
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#define MAX_TBSAMPLE_BYTES (12*1024*1024)
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#define MAX_SAMPLES (MAX_SAMPLE_BYTES/sizeof(u_int32_t))
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#define TB_SAMPLE_SIZE (sizeof(tb_sample_t))
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#define MAX_TB_SAMPLES (MAX_TBSAMPLE_BYTES/TB_SAMPLE_SIZE)
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/* ioctls */
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#define SBPROF_ZBSTART _IOW('s', 0, int)
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#define SBPROF_ZBSTOP _IOW('s', 1, int)
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#define SBPROF_ZBWAITFULL _IOW('s', 2, int)
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/*
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* Routines for using 40-bit SCD cycle counter
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*
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* Client responsible for either handling interrupts or making sure
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* the cycles counter never saturates, e.g., by doing
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* zclk_timer_init(0) at least every 2^40 - 1 ZCLKs.
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*/
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/*
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* Configures SCD counter 0 to count ZCLKs starting from val;
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* Configures SCD counters1,2,3 to count nothing.
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* Must not be called while gathering ZBbus profiles.
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*/
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#define zclk_timer_init(val) \
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__asm__ __volatile__ (".set push;" \
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".set mips64;" \
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"la $8, 0xb00204c0;" /* SCD perf_cnt_cfg */ \
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"sd %0, 0x10($8);" /* write val to counter0 */ \
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"sd %1, 0($8);" /* config counter0 for zclks*/ \
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".set pop" \
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: /* no outputs */ \
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/* enable, counter0 */ \
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: /* inputs */ "r"(val), "r" ((1ULL << 33) | 1ULL) \
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: /* modifies */ "$8" )
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/* Reads SCD counter 0 and puts result in value
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unsigned long long val; */
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#define zclk_get(val) \
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__asm__ __volatile__ (".set push;" \
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".set mips64;" \
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"la $8, 0xb00204c0;" /* SCD perf_cnt_cfg */ \
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"ld %0, 0x10($8);" /* write val to counter0 */ \
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".set pop" \
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: /* outputs */ "=r"(val) \
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: /* inputs */ \
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: /* modifies */ "$8" )
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#define DEVNAME "sb_tbprof"
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#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES)
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/*
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* Support for ZBbus sampling using the trace buffer
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*
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* We use the SCD performance counter interrupt, caused by a Zclk counter
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* overflow, to trigger the start of tracing.
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*
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* We set the trace buffer to sample everything and freeze on
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* overflow.
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*
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* We map the interrupt for trace_buffer_freeze to handle it on CPU 0.
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*
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*/
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static u64 tb_period;
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static void arm_tb(void)
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{
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u64 scdperfcnt;
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u64 next = (1ULL << 40) - tb_period;
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u64 tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
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/*
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* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
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* trigger start of trace. XXX vary sampling period
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*/
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__raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1));
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scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
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/*
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* Unfortunately, in Pass 2 we must clear all counters to knock down
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* a previous interrupt request. This means that bus profiling
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* requires ALL of the SCD perf counters.
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*/
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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__raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
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/* keep counters 0,2,3,4,5,6,7 as is */
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V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
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IOADDR(A_BCM1480_SCD_PERF_CNT_CFG0));
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__raw_writeq(
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M_SPC_CFG_ENABLE | /* enable counting */
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M_SPC_CFG_CLEAR | /* clear all counters */
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V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
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IOADDR(A_BCM1480_SCD_PERF_CNT_CFG1));
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#else
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__raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
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/* keep counters 0,2,3 as is */
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M_SPC_CFG_ENABLE | /* enable counting */
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M_SPC_CFG_CLEAR | /* clear all counters */
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V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
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IOADDR(A_SCD_PERF_CNT_CFG));
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#endif
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__raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1));
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/* Reset the trace buffer */
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__raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
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#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
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/* XXXKW may want to expose control to the data-collector */
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tb_options |= M_SCD_TRACE_CFG_FORCECNT;
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#endif
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__raw_writeq(tb_options, IOADDR(A_SCD_TRACE_CFG));
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sbp.tb_armed = 1;
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}
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static irqreturn_t sbprof_tb_intr(int irq, void *dev_id)
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{
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int i;
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pr_debug(DEVNAME ": tb_intr\n");
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if (sbp.next_tb_sample < MAX_TB_SAMPLES) {
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/* XXX should use XKPHYS to make writes bypass L2 */
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u64 *p = sbp.sbprof_tbbuf[sbp.next_tb_sample++];
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/* Read out trace */
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__raw_writeq(M_SCD_TRACE_CFG_START_READ,
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IOADDR(A_SCD_TRACE_CFG));
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__asm__ __volatile__ ("sync" : : : "memory");
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/* Loop runs backwards because bundles are read out in reverse order */
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for (i = 256 * 6; i > 0; i -= 6) {
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/* Subscripts decrease to put bundle in the order */
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/* t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi */
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p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t2 hi */
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p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t2 lo */
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p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t1 hi */
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p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t1 lo */
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p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t0 hi */
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p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t0 lo */
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}
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if (!sbp.tb_enable) {
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pr_debug(DEVNAME ": tb_intr shutdown\n");
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__raw_writeq(M_SCD_TRACE_CFG_RESET,
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IOADDR(A_SCD_TRACE_CFG));
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sbp.tb_armed = 0;
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wake_up_interruptible(&sbp.tb_sync);
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} else {
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/* knock down current interrupt and get another one later */
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arm_tb();
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}
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} else {
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/* No more trace buffer samples */
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pr_debug(DEVNAME ": tb_intr full\n");
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__raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
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sbp.tb_armed = 0;
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if (!sbp.tb_enable)
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wake_up_interruptible(&sbp.tb_sync);
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wake_up_interruptible(&sbp.tb_read);
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}
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return IRQ_HANDLED;
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}
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static irqreturn_t sbprof_pc_intr(int irq, void *dev_id)
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{
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printk(DEVNAME ": unexpected pc_intr");
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return IRQ_NONE;
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}
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/*
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* Requires: Already called zclk_timer_init with a value that won't
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* saturate 40 bits. No subsequent use of SCD performance counters
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* or trace buffer.
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*/
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static int sbprof_zbprof_start(struct file *filp)
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{
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u64 scdperfcnt;
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int err;
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if (xchg(&sbp.tb_enable, 1))
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return -EBUSY;
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pr_debug(DEVNAME ": starting\n");
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sbp.next_tb_sample = 0;
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filp->f_pos = 0;
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err = request_irq(K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
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DEVNAME " trace freeze", &sbp);
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if (err)
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return -EBUSY;
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/* Make sure there isn't a perf-cnt interrupt waiting */
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scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
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/* Disable and clear counters, override SRC_1 */
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__raw_writeq((scdperfcnt & ~(M_SPC_CFG_SRC1 | M_SPC_CFG_ENABLE)) |
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M_SPC_CFG_ENABLE | M_SPC_CFG_CLEAR | V_SPC_CFG_SRC1(1),
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IOADDR(A_SCD_PERF_CNT_CFG));
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/*
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* We grab this interrupt to prevent others from trying to use
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* it, even though we don't want to service the interrupts
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* (they only feed into the trace-on-interrupt mechanism)
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*/
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if (request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0, DEVNAME " scd perfcnt", &sbp)) {
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free_irq(K_INT_TRACE_FREEZE, &sbp);
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return -EBUSY;
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}
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/*
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* I need the core to mask these, but the interrupt mapper to
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* pass them through. I am exploiting my knowledge that
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* cp0_status masks out IP[5]. krw
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*/
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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__raw_writeq(K_BCM1480_INT_MAP_I3,
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IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) +
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((K_BCM1480_INT_PERF_CNT & 0x3f) << 3)));
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#else
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__raw_writeq(K_INT_MAP_I3,
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IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
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(K_INT_PERF_CNT << 3)));
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#endif
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/* Initialize address traps */
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_1));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_2));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_3));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_0));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_1));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_2));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_3));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_0));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_1));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_2));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
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/* Initialize Trace Event 0-7 */
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/* when interrupt */
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__raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_3));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_4));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_5));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_6));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_7));
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/* Initialize Trace Sequence 0-7 */
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/* Start on event 0 (interrupt) */
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__raw_writeq(V_SCD_TRSEQ_FUNC_START | 0x0fff,
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IOADDR(A_SCD_TRACE_SEQUENCE_0));
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/* dsamp when d used | asamp when a used */
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__raw_writeq(M_SCD_TRSEQ_ASAMPLE | M_SCD_TRSEQ_DSAMPLE |
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K_SCD_TRSEQ_TRIGGER_ALL,
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IOADDR(A_SCD_TRACE_SEQUENCE_1));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_2));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_3));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_4));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_5));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_6));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
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/* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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__raw_writeq(1ULL << (K_BCM1480_INT_PERF_CNT & 0x3f),
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IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_TRACE_L)));
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#else
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__raw_writeq(1ULL << K_INT_PERF_CNT,
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IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE)));
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#endif
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arm_tb();
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pr_debug(DEVNAME ": done starting\n");
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return 0;
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}
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static int sbprof_zbprof_stop(void)
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{
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int err = 0;
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pr_debug(DEVNAME ": stopping\n");
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if (sbp.tb_enable) {
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/*
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* XXXKW there is a window here where the intr handler may run,
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* see the disable, and do the wake_up before this sleep
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* happens.
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*/
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pr_debug(DEVNAME ": wait for disarm\n");
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err = wait_event_interruptible(sbp.tb_sync, !sbp.tb_armed);
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pr_debug(DEVNAME ": disarm complete, stat %d\n", err);
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if (err)
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return err;
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sbp.tb_enable = 0;
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free_irq(K_INT_TRACE_FREEZE, &sbp);
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free_irq(K_INT_PERF_CNT, &sbp);
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}
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pr_debug(DEVNAME ": done stopping\n");
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return err;
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}
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static int sbprof_tb_open(struct inode *inode, struct file *filp)
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{
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int minor;
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int err = 0;
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lock_kernel();
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minor = iminor(inode);
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if (minor != 0) {
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err = -ENODEV;
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goto out;
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}
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if (xchg(&sbp.open, SB_OPENING) != SB_CLOSED) {
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err = -EBUSY;
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goto out;
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}
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memset(&sbp, 0, sizeof(struct sbprof_tb));
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sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
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if (!sbp.sbprof_tbbuf) {
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err = -ENOMEM;
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goto out;
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}
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memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
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init_waitqueue_head(&sbp.tb_sync);
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init_waitqueue_head(&sbp.tb_read);
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mutex_init(&sbp.lock);
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sbp.open = SB_OPEN;
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out:
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unlock_kernel();
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return err;
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}
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static int sbprof_tb_release(struct inode *inode, struct file *filp)
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{
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int minor;
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minor = iminor(inode);
|
|
if (minor != 0 || !sbp.open)
|
|
return -ENODEV;
|
|
|
|
mutex_lock(&sbp.lock);
|
|
|
|
if (sbp.tb_armed || sbp.tb_enable)
|
|
sbprof_zbprof_stop();
|
|
|
|
vfree(sbp.sbprof_tbbuf);
|
|
sbp.open = 0;
|
|
|
|
mutex_unlock(&sbp.lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t sbprof_tb_read(struct file *filp, char *buf,
|
|
size_t size, loff_t *offp)
|
|
{
|
|
int cur_sample, sample_off, cur_count, sample_left;
|
|
char *src;
|
|
int count = 0;
|
|
char *dest = buf;
|
|
long cur_off = *offp;
|
|
|
|
if (!access_ok(VERIFY_WRITE, buf, size))
|
|
return -EFAULT;
|
|
|
|
mutex_lock(&sbp.lock);
|
|
|
|
count = 0;
|
|
cur_sample = cur_off / TB_SAMPLE_SIZE;
|
|
sample_off = cur_off % TB_SAMPLE_SIZE;
|
|
sample_left = TB_SAMPLE_SIZE - sample_off;
|
|
|
|
while (size && (cur_sample < sbp.next_tb_sample)) {
|
|
int err;
|
|
|
|
cur_count = size < sample_left ? size : sample_left;
|
|
src = (char *)(((long)sbp.sbprof_tbbuf[cur_sample])+sample_off);
|
|
err = __copy_to_user(dest, src, cur_count);
|
|
if (err) {
|
|
*offp = cur_off + cur_count - err;
|
|
mutex_unlock(&sbp.lock);
|
|
return err;
|
|
}
|
|
pr_debug(DEVNAME ": read from sample %d, %d bytes\n",
|
|
cur_sample, cur_count);
|
|
size -= cur_count;
|
|
sample_left -= cur_count;
|
|
if (!sample_left) {
|
|
cur_sample++;
|
|
sample_off = 0;
|
|
sample_left = TB_SAMPLE_SIZE;
|
|
} else {
|
|
sample_off += cur_count;
|
|
}
|
|
cur_off += cur_count;
|
|
dest += cur_count;
|
|
count += cur_count;
|
|
}
|
|
*offp = cur_off;
|
|
mutex_unlock(&sbp.lock);
|
|
|
|
return count;
|
|
}
|
|
|
|
static long sbprof_tb_ioctl(struct file *filp,
|
|
unsigned int command,
|
|
unsigned long arg)
|
|
{
|
|
int err = 0;
|
|
|
|
switch (command) {
|
|
case SBPROF_ZBSTART:
|
|
mutex_lock(&sbp.lock);
|
|
err = sbprof_zbprof_start(filp);
|
|
mutex_unlock(&sbp.lock);
|
|
break;
|
|
|
|
case SBPROF_ZBSTOP:
|
|
mutex_lock(&sbp.lock);
|
|
err = sbprof_zbprof_stop();
|
|
mutex_unlock(&sbp.lock);
|
|
break;
|
|
|
|
case SBPROF_ZBWAITFULL: {
|
|
err = wait_event_interruptible(sbp.tb_read, TB_FULL);
|
|
if (err)
|
|
break;
|
|
|
|
err = put_user(TB_FULL, (int *) arg);
|
|
break;
|
|
}
|
|
|
|
default:
|
|
err = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static const struct file_operations sbprof_tb_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = sbprof_tb_open,
|
|
.release = sbprof_tb_release,
|
|
.read = sbprof_tb_read,
|
|
.unlocked_ioctl = sbprof_tb_ioctl,
|
|
.compat_ioctl = sbprof_tb_ioctl,
|
|
.mmap = NULL,
|
|
};
|
|
|
|
static struct class *tb_class;
|
|
static struct device *tb_dev;
|
|
|
|
static int __init sbprof_tb_init(void)
|
|
{
|
|
struct device *dev;
|
|
struct class *tbc;
|
|
int err;
|
|
|
|
if (register_chrdev(SBPROF_TB_MAJOR, DEVNAME, &sbprof_tb_fops)) {
|
|
printk(KERN_WARNING DEVNAME ": initialization failed (dev %d)\n",
|
|
SBPROF_TB_MAJOR);
|
|
return -EIO;
|
|
}
|
|
|
|
tbc = class_create(THIS_MODULE, "sb_tracebuffer");
|
|
if (IS_ERR(tbc)) {
|
|
err = PTR_ERR(tbc);
|
|
goto out_chrdev;
|
|
}
|
|
|
|
tb_class = tbc;
|
|
|
|
dev = device_create_drvdata(tbc, NULL, MKDEV(SBPROF_TB_MAJOR, 0),
|
|
NULL, "tb");
|
|
if (IS_ERR(dev)) {
|
|
err = PTR_ERR(dev);
|
|
goto out_class;
|
|
}
|
|
tb_dev = dev;
|
|
|
|
sbp.open = 0;
|
|
tb_period = zbbus_mhz * 10000LL;
|
|
pr_info(DEVNAME ": initialized - tb_period = %lld\n",
|
|
(long long) tb_period);
|
|
return 0;
|
|
|
|
out_class:
|
|
class_destroy(tb_class);
|
|
out_chrdev:
|
|
unregister_chrdev(SBPROF_TB_MAJOR, DEVNAME);
|
|
|
|
return err;
|
|
}
|
|
|
|
static void __exit sbprof_tb_cleanup(void)
|
|
{
|
|
device_destroy(tb_class, MKDEV(SBPROF_TB_MAJOR, 0));
|
|
unregister_chrdev(SBPROF_TB_MAJOR, DEVNAME);
|
|
class_destroy(tb_class);
|
|
}
|
|
|
|
module_init(sbprof_tb_init);
|
|
module_exit(sbprof_tb_cleanup);
|
|
|
|
MODULE_ALIAS_CHARDEV_MAJOR(SBPROF_TB_MAJOR);
|
|
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
|
|
MODULE_LICENSE("GPL");
|