Will Deacon ff9a184cfb ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler ... The ARM PCS mandates that the length and stride bits of the fpscr are cleared on entry to and return from a public interface. Although signal handlers run asynchronously with respect to the interrupted function, the handler itself expects to run as though it has been called like a normal function. This patch updates the state mirroring the VFP hardware before entry to a signal handler so that it adheres to the PCS. Furthermore, we disable VFP to ensure that we trap on any floating point operation performed by the signal handler and synchronise the hardware appropriately. A check is inserted after the signal handler to avoid redundant flushing if VFP was not used. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2012-04-23 15:44:42 +01:00
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entry.S
Makefile	ARM: vfp: use -mfloat-abi=soft to build vfp	2011-10-01 21:08:55 +02:00
vfp.h
vfpdouble.c
vfphw.S	ARM: vfp: fix a hole in VFP thread migration	2011-07-09 17:22:12 +01:00
vfpinstr.h
vfpmodule.c	ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler	2012-04-23 15:44:42 +01:00
vfpsingle.c