87ebecf14c
Match i386, where we have this in the irq code. It belongs there. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
266 lines
6.5 KiB
C
266 lines
6.5 KiB
C
/*
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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* This file contains the lowest level x86_64-specific interrupt
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* entry and irq statistics code. All the remaining irq logic is
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* done by the generic kernel/irq/ code and in the
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* x86_64-specific irq controller code. (e.g. i8259.c and
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* io_apic.c.)
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*/
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#include <linux/kernel_stat.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <asm/uaccess.h>
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#include <asm/io_apic.h>
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#include <asm/idle.h>
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#include <asm/smp.h>
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atomic_t irq_err_count;
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/*
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* 'what should we do if we get a hw irq event on an illegal vector'.
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* each architecture has to answer this themselves.
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*/
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void ack_bad_irq(unsigned int irq)
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{
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printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq);
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/*
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* Currently unexpected vectors happen only on SMP and APIC.
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* We _must_ ack these because every local APIC has only N
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* irq slots per priority level, and a 'hanging, unacked' IRQ
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* holds up an irq slot - in excessive cases (when multiple
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* unexpected vectors occur) that might lock up the APIC
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* completely.
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* But don't ack when the APIC is disabled. -AK
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*/
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if (!disable_apic)
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ack_APIC_irq();
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}
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/*
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* Probabilistic stack overflow check:
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*
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* Only check the stack in process context, because everything else
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* runs on the big interrupt stacks. Checking reliably is too expensive,
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* so we just check from interrupts.
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*/
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static inline void stack_overflow_check(struct pt_regs *regs)
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{
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u64 curbase = (u64)task_stack_page(current);
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static unsigned long warned = -60*HZ;
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if (regs->rsp >= curbase && regs->rsp <= curbase + THREAD_SIZE &&
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regs->rsp < curbase + sizeof(struct thread_info) + 128 &&
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time_after(jiffies, warned + 60*HZ)) {
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printk("do_IRQ: %s near stack overflow (cur:%Lx,rsp:%lx)\n",
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current->comm, curbase, regs->rsp);
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show_stack(NULL,NULL);
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warned = jiffies;
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}
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}
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#endif
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/*
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* Generic, controller-independent functions:
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*/
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *) v, j;
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struct irqaction * action;
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unsigned long flags;
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if (i == 0) {
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seq_printf(p, " ");
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for_each_online_cpu(j)
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seq_printf(p, "CPU%-8d",j);
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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unsigned any_count = 0;
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spin_lock_irqsave(&irq_desc[i].lock, flags);
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#ifndef CONFIG_SMP
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any_count = kstat_irqs(i);
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#else
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for_each_online_cpu(j)
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any_count |= kstat_cpu(j).irqs[i];
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#endif
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action = irq_desc[i].action;
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if (!action && !any_count)
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goto skip;
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seq_printf(p, "%3d: ",i);
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#ifndef CONFIG_SMP
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seq_printf(p, "%10u ", kstat_irqs(i));
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#else
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
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#endif
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seq_printf(p, " %8s", irq_desc[i].chip->name);
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seq_printf(p, "-%-8s", irq_desc[i].name);
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if (action) {
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seq_printf(p, " %s", action->name);
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while ((action = action->next) != NULL)
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seq_printf(p, ", %s", action->name);
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}
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seq_putc(p, '\n');
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skip:
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spin_unlock_irqrestore(&irq_desc[i].lock, flags);
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} else if (i == NR_IRQS) {
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seq_printf(p, "NMI: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", cpu_pda(j)->__nmi_count);
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seq_printf(p, " Non-maskable interrupts\n");
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seq_printf(p, "LOC: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", cpu_pda(j)->apic_timer_irqs);
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seq_printf(p, " Local timer interrupts\n");
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#ifdef CONFIG_SMP
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seq_printf(p, "RES: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", cpu_pda(j)->irq_resched_count);
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seq_printf(p, " Rescheduling interrupts\n");
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seq_printf(p, "CAL: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", cpu_pda(j)->irq_call_count);
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seq_printf(p, " function call interrupts\n");
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seq_printf(p, "TLB: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", cpu_pda(j)->irq_tlb_count);
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seq_printf(p, " TLB shootdowns\n");
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#endif
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seq_printf(p, "TRM: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", cpu_pda(j)->irq_thermal_count);
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seq_printf(p, " Thermal event interrupts\n");
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seq_printf(p, "THR: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", cpu_pda(j)->irq_threshold_count);
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seq_printf(p, " Threshold APIC interrupts\n");
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seq_printf(p, "SPU: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", cpu_pda(j)->irq_spurious_count);
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seq_printf(p, " Spurious interrupts\n");
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seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
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}
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return 0;
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}
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/*
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* do_IRQ handles all normal device IRQ's (the special
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* SMP cross-CPU interrupts have their own specific
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* handlers).
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*/
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asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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/* high bit used in ret_from_ code */
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unsigned vector = ~regs->orig_rax;
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unsigned irq;
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exit_idle();
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irq_enter();
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irq = __get_cpu_var(vector_irq)[vector];
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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stack_overflow_check(regs);
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#endif
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if (likely(irq < NR_IRQS))
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generic_handle_irq(irq);
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else {
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if (!disable_apic)
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ack_APIC_irq();
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if (printk_ratelimit())
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printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n",
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__func__, smp_processor_id(), vector);
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}
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irq_exit();
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set_irq_regs(old_regs);
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return 1;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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void fixup_irqs(cpumask_t map)
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{
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unsigned int irq;
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static int warned;
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for (irq = 0; irq < NR_IRQS; irq++) {
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cpumask_t mask;
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int break_affinity = 0;
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int set_affinity = 1;
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if (irq == 2)
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continue;
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/* interrupt's are disabled at this point */
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spin_lock(&irq_desc[irq].lock);
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if (!irq_has_action(irq) ||
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cpus_equal(irq_desc[irq].affinity, map)) {
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spin_unlock(&irq_desc[irq].lock);
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continue;
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}
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cpus_and(mask, irq_desc[irq].affinity, map);
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if (cpus_empty(mask)) {
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break_affinity = 1;
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mask = map;
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}
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if (irq_desc[irq].chip->mask)
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irq_desc[irq].chip->mask(irq);
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if (irq_desc[irq].chip->set_affinity)
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irq_desc[irq].chip->set_affinity(irq, mask);
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else if (!(warned++))
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set_affinity = 0;
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if (irq_desc[irq].chip->unmask)
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irq_desc[irq].chip->unmask(irq);
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spin_unlock(&irq_desc[irq].lock);
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if (break_affinity && set_affinity)
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printk("Broke affinity for irq %i\n", irq);
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else if (!set_affinity)
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printk("Cannot set affinity for irq %i\n", irq);
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}
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/* That doesn't seem sufficient. Give it 1ms. */
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local_irq_enable();
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mdelay(1);
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local_irq_disable();
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}
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#endif
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extern void call_softirq(void);
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asmlinkage void do_softirq(void)
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{
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__u32 pending;
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unsigned long flags;
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if (in_interrupt())
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return;
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local_irq_save(flags);
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pending = local_softirq_pending();
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/* Switch to interrupt stack */
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if (pending) {
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call_softirq();
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WARN_ON_ONCE(softirq_count());
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}
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local_irq_restore(flags);
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}
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