4cbd6b167f
kernel/sched.c:7354:2: warning: initialization from incompatible pointer type Align cpu_coregroup_mask prototype interface with sched_domain_mask_f typedef use int cpu instead of unsigned int cpu Cc: <stable@vger.kernel.org> Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
148 lines
3.7 KiB
C
148 lines
3.7 KiB
C
/*
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* arch/arm/kernel/topology.c
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*
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* Copyright (C) 2011 Linaro Limited.
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* Written by: Vincent Guittot
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*
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* based on arch/sh/kernel/topology.c
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/cpu.h>
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#include <linux/cpumask.h>
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#include <linux/init.h>
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#include <linux/percpu.h>
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#include <linux/node.h>
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#include <linux/nodemask.h>
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#include <linux/sched.h>
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#include <asm/cputype.h>
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#include <asm/topology.h>
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#define MPIDR_SMP_BITMASK (0x3 << 30)
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#define MPIDR_SMP_VALUE (0x2 << 30)
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#define MPIDR_MT_BITMASK (0x1 << 24)
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/*
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* These masks reflect the current use of the affinity levels.
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* The affinity level can be up to 16 bits according to ARM ARM
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*/
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#define MPIDR_LEVEL0_MASK 0x3
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#define MPIDR_LEVEL0_SHIFT 0
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#define MPIDR_LEVEL1_MASK 0xF
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#define MPIDR_LEVEL1_SHIFT 8
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#define MPIDR_LEVEL2_MASK 0xFF
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#define MPIDR_LEVEL2_SHIFT 16
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struct cputopo_arm cpu_topology[NR_CPUS];
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const struct cpumask *cpu_coregroup_mask(int cpu)
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{
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return &cpu_topology[cpu].core_sibling;
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}
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/*
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* store_cpu_topology is called at boot when only one cpu is running
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* and with the mutex cpu_hotplug.lock locked, when several cpus have booted,
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* which prevents simultaneous write access to cpu_topology array
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*/
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void store_cpu_topology(unsigned int cpuid)
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{
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struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid];
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unsigned int mpidr;
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unsigned int cpu;
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/* If the cpu topology has been already set, just return */
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if (cpuid_topo->core_id != -1)
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return;
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mpidr = read_cpuid_mpidr();
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/* create cpu topology mapping */
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if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) {
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/*
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* This is a multiprocessor system
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* multiprocessor format & multiprocessor mode field are set
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*/
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if (mpidr & MPIDR_MT_BITMASK) {
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/* core performance interdependency */
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cpuid_topo->thread_id = (mpidr >> MPIDR_LEVEL0_SHIFT)
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& MPIDR_LEVEL0_MASK;
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cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL1_SHIFT)
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& MPIDR_LEVEL1_MASK;
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cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL2_SHIFT)
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& MPIDR_LEVEL2_MASK;
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} else {
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/* largely independent cores */
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cpuid_topo->thread_id = -1;
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cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL0_SHIFT)
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& MPIDR_LEVEL0_MASK;
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cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL1_SHIFT)
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& MPIDR_LEVEL1_MASK;
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}
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} else {
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/*
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* This is an uniprocessor system
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* we are in multiprocessor format but uniprocessor system
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* or in the old uniprocessor format
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*/
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cpuid_topo->thread_id = -1;
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cpuid_topo->core_id = 0;
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cpuid_topo->socket_id = -1;
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}
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/* update core and thread sibling masks */
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for_each_possible_cpu(cpu) {
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struct cputopo_arm *cpu_topo = &cpu_topology[cpu];
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if (cpuid_topo->socket_id == cpu_topo->socket_id) {
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cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
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if (cpu != cpuid)
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cpumask_set_cpu(cpu,
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&cpuid_topo->core_sibling);
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if (cpuid_topo->core_id == cpu_topo->core_id) {
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cpumask_set_cpu(cpuid,
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&cpu_topo->thread_sibling);
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if (cpu != cpuid)
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cpumask_set_cpu(cpu,
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&cpuid_topo->thread_sibling);
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}
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}
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}
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smp_wmb();
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printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n",
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cpuid, cpu_topology[cpuid].thread_id,
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cpu_topology[cpuid].core_id,
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cpu_topology[cpuid].socket_id, mpidr);
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}
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/*
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* init_cpu_topology is called at boot when only one cpu is running
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* which prevent simultaneous write access to cpu_topology array
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*/
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void init_cpu_topology(void)
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{
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unsigned int cpu;
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/* init core mask */
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for_each_possible_cpu(cpu) {
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struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]);
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cpu_topo->thread_id = -1;
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cpu_topo->core_id = -1;
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cpu_topo->socket_id = -1;
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cpumask_clear(&cpu_topo->core_sibling);
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cpumask_clear(&cpu_topo->thread_sibling);
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}
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smp_wmb();
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}
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