d17adfdb17
The Tegra PMC (Power Management Controller) interfaces with an external PMU (Power Management Unit), and controls wake-up from sleep modes. This initial binding is the bare minimum required to control the PMC's inversion of the PMU's interrupt signal. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
115 lines
2 KiB
Text
115 lines
2 KiB
Text
/dts-v1/;
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/include/ "tegra20.dtsi"
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/ {
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model = "NVIDIA Tegra2 Harmony evaluation board";
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compatible = "nvidia,harmony", "nvidia,tegra20";
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memory@0 {
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reg = < 0x00000000 0x40000000 >;
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};
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pmc@7000f400 {
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nvidia,invert-interrupt;
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};
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i2c@7000c000 {
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clock-frequency = <400000>;
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wm8903: wm8903@1a {
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compatible = "wlf,wm8903";
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reg = <0x1a>;
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interrupt-parent = <&gpio>;
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interrupts = < 187 0x04 >;
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gpio-controller;
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#gpio-cells = <2>;
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micdet-cfg = <0>;
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micdet-delay = <100>;
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gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
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};
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};
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i2c@7000c400 {
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clock-frequency = <400000>;
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};
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i2c@7000c500 {
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clock-frequency = <400000>;
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};
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i2c@7000d000 {
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clock-frequency = <400000>;
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};
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i2s@70002a00 {
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status = "disable";
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};
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sound {
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compatible = "nvidia,tegra-audio-wm8903-harmony",
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"nvidia,tegra-audio-wm8903";
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nvidia,model = "NVIDIA Tegra Harmony";
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nvidia,audio-routing =
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"Headphone Jack", "HPOUTR",
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"Headphone Jack", "HPOUTL",
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"Int Spk", "ROP",
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"Int Spk", "RON",
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"Int Spk", "LOP",
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"Int Spk", "LON",
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"Mic Jack", "MICBIAS",
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"IN1L", "Mic Jack";
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nvidia,i2s-controller = <&tegra_i2s1>;
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nvidia,audio-codec = <&wm8903>;
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nvidia,spkr-en-gpios = <&wm8903 2 0>;
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nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
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nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
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nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
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};
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serial@70006000 {
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status = "disable";
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};
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serial@70006040 {
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status = "disable";
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};
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serial@70006200 {
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status = "disable";
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};
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serial@70006300 {
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clock-frequency = < 216000000 >;
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};
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serial@70006400 {
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status = "disable";
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};
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sdhci@c8000000 {
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status = "disable";
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};
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sdhci@c8000200 {
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cd-gpios = <&gpio 69 0>; /* gpio PI5 */
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wp-gpios = <&gpio 57 0>; /* gpio PH1 */
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power-gpios = <&gpio 155 0>; /* gpio PT3 */
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};
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sdhci@c8000400 {
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status = "disable";
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};
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sdhci@c8000600 {
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cd-gpios = <&gpio 58 0>; /* gpio PH2 */
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wp-gpios = <&gpio 59 0>; /* gpio PH3 */
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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support-8bit;
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};
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};
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