997eea4691
ERROR: space prohibited before that ',' (ctx:WxW) + da9052_free_irq(da9052, DA9052_IRQ_ADC_EOM , da9052); total: 1 errors, 0 warnings, 290 lines checked Cc: Support Opensource <support.opensource@diasemi.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
290 lines
6 KiB
C
290 lines
6 KiB
C
/*
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* DA9052 interrupt support
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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* Based on arizona-irq.c, which is:
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*
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* Copyright 2012 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/mfd/da9052/da9052.h>
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#include <linux/mfd/da9052/reg.h>
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#define DA9052_NUM_IRQ_REGS 4
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#define DA9052_IRQ_MASK_POS_1 0x01
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#define DA9052_IRQ_MASK_POS_2 0x02
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#define DA9052_IRQ_MASK_POS_3 0x04
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#define DA9052_IRQ_MASK_POS_4 0x08
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#define DA9052_IRQ_MASK_POS_5 0x10
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#define DA9052_IRQ_MASK_POS_6 0x20
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#define DA9052_IRQ_MASK_POS_7 0x40
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#define DA9052_IRQ_MASK_POS_8 0x80
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static const struct regmap_irq da9052_irqs[] = {
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[DA9052_IRQ_DCIN] = {
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.reg_offset = 0,
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.mask = DA9052_IRQ_MASK_POS_1,
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},
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[DA9052_IRQ_VBUS] = {
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.reg_offset = 0,
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.mask = DA9052_IRQ_MASK_POS_2,
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},
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[DA9052_IRQ_DCINREM] = {
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.reg_offset = 0,
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.mask = DA9052_IRQ_MASK_POS_3,
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},
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[DA9052_IRQ_VBUSREM] = {
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.reg_offset = 0,
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.mask = DA9052_IRQ_MASK_POS_4,
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},
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[DA9052_IRQ_VDDLOW] = {
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.reg_offset = 0,
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.mask = DA9052_IRQ_MASK_POS_5,
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},
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[DA9052_IRQ_ALARM] = {
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.reg_offset = 0,
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.mask = DA9052_IRQ_MASK_POS_6,
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},
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[DA9052_IRQ_SEQRDY] = {
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.reg_offset = 0,
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.mask = DA9052_IRQ_MASK_POS_7,
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},
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[DA9052_IRQ_COMP1V2] = {
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.reg_offset = 0,
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.mask = DA9052_IRQ_MASK_POS_8,
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},
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[DA9052_IRQ_NONKEY] = {
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.reg_offset = 1,
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.mask = DA9052_IRQ_MASK_POS_1,
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},
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[DA9052_IRQ_IDFLOAT] = {
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.reg_offset = 1,
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.mask = DA9052_IRQ_MASK_POS_2,
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},
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[DA9052_IRQ_IDGND] = {
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.reg_offset = 1,
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.mask = DA9052_IRQ_MASK_POS_3,
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},
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[DA9052_IRQ_CHGEND] = {
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.reg_offset = 1,
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.mask = DA9052_IRQ_MASK_POS_4,
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},
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[DA9052_IRQ_TBAT] = {
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.reg_offset = 1,
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.mask = DA9052_IRQ_MASK_POS_5,
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},
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[DA9052_IRQ_ADC_EOM] = {
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.reg_offset = 1,
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.mask = DA9052_IRQ_MASK_POS_6,
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},
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[DA9052_IRQ_PENDOWN] = {
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.reg_offset = 1,
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.mask = DA9052_IRQ_MASK_POS_7,
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},
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[DA9052_IRQ_TSIREADY] = {
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.reg_offset = 1,
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.mask = DA9052_IRQ_MASK_POS_8,
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},
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[DA9052_IRQ_GPI0] = {
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.reg_offset = 2,
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.mask = DA9052_IRQ_MASK_POS_1,
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},
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[DA9052_IRQ_GPI1] = {
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.reg_offset = 2,
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.mask = DA9052_IRQ_MASK_POS_2,
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},
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[DA9052_IRQ_GPI2] = {
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.reg_offset = 2,
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.mask = DA9052_IRQ_MASK_POS_3,
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},
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[DA9052_IRQ_GPI3] = {
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.reg_offset = 2,
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.mask = DA9052_IRQ_MASK_POS_4,
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},
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[DA9052_IRQ_GPI4] = {
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.reg_offset = 2,
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.mask = DA9052_IRQ_MASK_POS_5,
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},
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[DA9052_IRQ_GPI5] = {
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.reg_offset = 2,
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.mask = DA9052_IRQ_MASK_POS_6,
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},
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[DA9052_IRQ_GPI6] = {
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.reg_offset = 2,
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.mask = DA9052_IRQ_MASK_POS_7,
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},
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[DA9052_IRQ_GPI7] = {
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.reg_offset = 2,
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.mask = DA9052_IRQ_MASK_POS_8,
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},
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[DA9052_IRQ_GPI8] = {
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.reg_offset = 3,
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.mask = DA9052_IRQ_MASK_POS_1,
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},
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[DA9052_IRQ_GPI9] = {
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.reg_offset = 3,
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.mask = DA9052_IRQ_MASK_POS_2,
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},
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[DA9052_IRQ_GPI10] = {
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.reg_offset = 3,
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.mask = DA9052_IRQ_MASK_POS_3,
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},
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[DA9052_IRQ_GPI11] = {
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.reg_offset = 3,
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.mask = DA9052_IRQ_MASK_POS_4,
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},
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[DA9052_IRQ_GPI12] = {
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.reg_offset = 3,
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.mask = DA9052_IRQ_MASK_POS_5,
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},
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[DA9052_IRQ_GPI13] = {
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.reg_offset = 3,
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.mask = DA9052_IRQ_MASK_POS_6,
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},
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[DA9052_IRQ_GPI14] = {
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.reg_offset = 3,
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.mask = DA9052_IRQ_MASK_POS_7,
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},
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[DA9052_IRQ_GPI15] = {
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.reg_offset = 3,
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.mask = DA9052_IRQ_MASK_POS_8,
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},
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};
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static const struct regmap_irq_chip da9052_regmap_irq_chip = {
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.name = "da9052_irq",
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.status_base = DA9052_EVENT_A_REG,
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.mask_base = DA9052_IRQ_MASK_A_REG,
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.ack_base = DA9052_EVENT_A_REG,
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.num_regs = DA9052_NUM_IRQ_REGS,
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.irqs = da9052_irqs,
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.num_irqs = ARRAY_SIZE(da9052_irqs),
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};
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static int da9052_map_irq(struct da9052 *da9052, int irq)
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{
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return regmap_irq_get_virq(da9052->irq_data, irq);
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}
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int da9052_enable_irq(struct da9052 *da9052, int irq)
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{
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irq = da9052_map_irq(da9052, irq);
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if (irq < 0)
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return irq;
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enable_irq(irq);
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return 0;
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}
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EXPORT_SYMBOL_GPL(da9052_enable_irq);
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int da9052_disable_irq(struct da9052 *da9052, int irq)
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{
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irq = da9052_map_irq(da9052, irq);
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if (irq < 0)
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return irq;
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disable_irq(irq);
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return 0;
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}
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EXPORT_SYMBOL_GPL(da9052_disable_irq);
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int da9052_disable_irq_nosync(struct da9052 *da9052, int irq)
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{
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irq = da9052_map_irq(da9052, irq);
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if (irq < 0)
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return irq;
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disable_irq_nosync(irq);
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return 0;
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}
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EXPORT_SYMBOL_GPL(da9052_disable_irq_nosync);
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int da9052_request_irq(struct da9052 *da9052, int irq, char *name,
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irq_handler_t handler, void *data)
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{
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irq = da9052_map_irq(da9052, irq);
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if (irq < 0)
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return irq;
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return request_threaded_irq(irq, NULL, handler,
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IRQF_TRIGGER_LOW | IRQF_ONESHOT,
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name, data);
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}
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EXPORT_SYMBOL_GPL(da9052_request_irq);
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void da9052_free_irq(struct da9052 *da9052, int irq, void *data)
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{
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irq = da9052_map_irq(da9052, irq);
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if (irq < 0)
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return;
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free_irq(irq, data);
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}
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EXPORT_SYMBOL_GPL(da9052_free_irq);
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static irqreturn_t da9052_auxadc_irq(int irq, void *irq_data)
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{
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struct da9052 *da9052 = irq_data;
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complete(&da9052->done);
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return IRQ_HANDLED;
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}
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int da9052_irq_init(struct da9052 *da9052)
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{
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int ret;
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ret = regmap_add_irq_chip(da9052->regmap, da9052->chip_irq,
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IRQF_TRIGGER_LOW | IRQF_ONESHOT,
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-1, &da9052_regmap_irq_chip,
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&da9052->irq_data);
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if (ret < 0) {
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dev_err(da9052->dev, "regmap_add_irq_chip failed: %d\n", ret);
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goto regmap_err;
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}
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enable_irq_wake(da9052->chip_irq);
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ret = da9052_request_irq(da9052, DA9052_IRQ_ADC_EOM, "adc-irq",
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da9052_auxadc_irq, da9052);
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if (ret != 0) {
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dev_err(da9052->dev, "DA9052_IRQ_ADC_EOM failed: %d\n", ret);
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goto request_irq_err;
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}
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return 0;
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request_irq_err:
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regmap_del_irq_chip(da9052->chip_irq, da9052->irq_data);
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regmap_err:
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return ret;
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}
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int da9052_irq_exit(struct da9052 *da9052)
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{
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da9052_free_irq(da9052, DA9052_IRQ_ADC_EOM, da9052);
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regmap_del_irq_chip(da9052->chip_irq, da9052->irq_data);
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return 0;
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}
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