9dfcd15a6d
It is always == '((base) + 0x206)' if CONFIG_IDE_ARCH_OBSOLETE_DEFAULTS=y and it is not needed otherwise (arm, blackfin, parisc, ppc64, sh, sparc[64]). Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
118 lines
2.4 KiB
C
118 lines
2.4 KiB
C
/* $Id: ide.h,v 1.21 2001/09/25 20:21:48 kanoj Exp $
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* ide.h: Ultra/PCI specific IDE glue.
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*
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* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
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*/
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#ifndef _SPARC64_IDE_H
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#define _SPARC64_IDE_H
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#ifdef __KERNEL__
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#include <asm/pgalloc.h>
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#include <asm/io.h>
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#include <asm/spitfire.h>
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#include <asm/cacheflush.h>
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#include <asm/page.h>
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#ifndef MAX_HWIFS
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# ifdef CONFIG_BLK_DEV_IDEPCI
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#define MAX_HWIFS 10
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# else
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#define MAX_HWIFS 2
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# endif
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#endif
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#define __ide_insl(data_reg, buffer, wcount) \
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__ide_insw(data_reg, buffer, (wcount)<<1)
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#define __ide_outsl(data_reg, buffer, wcount) \
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__ide_outsw(data_reg, buffer, (wcount)<<1)
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/* On sparc64, I/O ports and MMIO registers are accessed identically. */
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#define __ide_mm_insw __ide_insw
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#define __ide_mm_insl __ide_insl
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#define __ide_mm_outsw __ide_outsw
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#define __ide_mm_outsl __ide_outsl
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static inline unsigned int inw_be(void __iomem *addr)
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{
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unsigned int ret;
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__asm__ __volatile__("lduha [%1] %2, %0"
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: "=r" (ret)
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: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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return ret;
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}
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static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
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{
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#ifdef DCACHE_ALIASING_POSSIBLE
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unsigned long end = (unsigned long)dst + (count << 1);
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#endif
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u16 *ps = dst;
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u32 *pi;
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if(((u64)ps) & 0x2) {
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*ps++ = inw_be(port);
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count--;
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}
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pi = (u32 *)ps;
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while(count >= 2) {
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u32 w;
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w = inw_be(port) << 16;
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w |= inw_be(port);
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*pi++ = w;
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count -= 2;
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}
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ps = (u16 *)pi;
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if(count)
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*ps++ = inw_be(port);
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#ifdef DCACHE_ALIASING_POSSIBLE
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__flush_dcache_range((unsigned long)dst, end);
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#endif
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}
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static inline void outw_be(unsigned short w, void __iomem *addr)
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{
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__asm__ __volatile__("stha %0, [%1] %2"
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: /* no outputs */
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: "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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}
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static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
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{
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#ifdef DCACHE_ALIASING_POSSIBLE
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unsigned long end = (unsigned long)src + (count << 1);
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#endif
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const u16 *ps = src;
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const u32 *pi;
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if(((u64)src) & 0x2) {
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outw_be(*ps++, port);
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count--;
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}
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pi = (const u32 *)ps;
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while(count >= 2) {
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u32 w;
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w = *pi++;
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outw_be((w >> 16), port);
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outw_be(w, port);
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count -= 2;
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}
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ps = (const u16 *)pi;
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if(count)
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outw_be(*ps, port);
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#ifdef DCACHE_ALIASING_POSSIBLE
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__flush_dcache_range((unsigned long)src, end);
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#endif
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}
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#endif /* __KERNEL__ */
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#endif /* _SPARC64_IDE_H */
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