62ee73d284
The Makefile entry controlling compilation of this code is "obj-y" meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. We don't replace module.h with init.h since the file already has that. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13931/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
170 lines
3.8 KiB
C
170 lines
3.8 KiB
C
/*
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* Ralink RT2880 timer
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* Author: John Crispin
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2013 John Crispin <john@phrozen.org>
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*/
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/timer.h>
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#include <linux/of_gpio.h>
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#include <linux/clk.h>
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#include <asm/mach-ralink/ralink_regs.h>
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#define TIMER_REG_TMRSTAT 0x00
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#define TIMER_REG_TMR0LOAD 0x10
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#define TIMER_REG_TMR0CTL 0x18
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#define TMRSTAT_TMR0INT BIT(0)
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#define TMR0CTL_ENABLE BIT(7)
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#define TMR0CTL_MODE_PERIODIC BIT(4)
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#define TMR0CTL_PRESCALER 1
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#define TMR0CTL_PRESCALE_VAL (0xf - TMR0CTL_PRESCALER)
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#define TMR0CTL_PRESCALE_DIV (65536 / BIT(TMR0CTL_PRESCALER))
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struct rt_timer {
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struct device *dev;
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void __iomem *membase;
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int irq;
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unsigned long timer_freq;
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unsigned long timer_div;
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};
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static inline void rt_timer_w32(struct rt_timer *rt, u8 reg, u32 val)
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{
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__raw_writel(val, rt->membase + reg);
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}
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static inline u32 rt_timer_r32(struct rt_timer *rt, u8 reg)
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{
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return __raw_readl(rt->membase + reg);
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}
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static irqreturn_t rt_timer_irq(int irq, void *_rt)
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{
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struct rt_timer *rt = (struct rt_timer *) _rt;
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rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
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rt_timer_w32(rt, TIMER_REG_TMRSTAT, TMRSTAT_TMR0INT);
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return IRQ_HANDLED;
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}
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static int rt_timer_request(struct rt_timer *rt)
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{
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int err = request_irq(rt->irq, rt_timer_irq, 0,
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dev_name(rt->dev), rt);
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if (err) {
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dev_err(rt->dev, "failed to request irq\n");
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} else {
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u32 t = TMR0CTL_MODE_PERIODIC | TMR0CTL_PRESCALE_VAL;
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rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
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}
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return err;
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}
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static void rt_timer_free(struct rt_timer *rt)
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{
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free_irq(rt->irq, rt);
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}
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static int rt_timer_config(struct rt_timer *rt, unsigned long divisor)
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{
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if (rt->timer_freq < divisor)
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rt->timer_div = rt->timer_freq;
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else
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rt->timer_div = divisor;
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rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
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return 0;
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}
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static int rt_timer_enable(struct rt_timer *rt)
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{
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u32 t;
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rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
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t = rt_timer_r32(rt, TIMER_REG_TMR0CTL);
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t |= TMR0CTL_ENABLE;
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rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
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return 0;
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}
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static void rt_timer_disable(struct rt_timer *rt)
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{
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u32 t;
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t = rt_timer_r32(rt, TIMER_REG_TMR0CTL);
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t &= ~TMR0CTL_ENABLE;
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rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
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}
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static int rt_timer_probe(struct platform_device *pdev)
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{
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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struct rt_timer *rt;
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struct clk *clk;
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rt = devm_kzalloc(&pdev->dev, sizeof(*rt), GFP_KERNEL);
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if (!rt) {
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dev_err(&pdev->dev, "failed to allocate memory\n");
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return -ENOMEM;
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}
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rt->irq = platform_get_irq(pdev, 0);
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if (!rt->irq) {
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dev_err(&pdev->dev, "failed to load irq\n");
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return -ENOENT;
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}
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rt->membase = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(rt->membase))
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return PTR_ERR(rt->membase);
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clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "failed get clock rate\n");
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return PTR_ERR(clk);
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}
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rt->timer_freq = clk_get_rate(clk) / TMR0CTL_PRESCALE_DIV;
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if (!rt->timer_freq)
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return -EINVAL;
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rt->dev = &pdev->dev;
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platform_set_drvdata(pdev, rt);
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rt_timer_request(rt);
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rt_timer_config(rt, 2);
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rt_timer_enable(rt);
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dev_info(&pdev->dev, "maximum frequency is %luHz\n", rt->timer_freq);
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return 0;
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}
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static const struct of_device_id rt_timer_match[] = {
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{ .compatible = "ralink,rt2880-timer" },
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{},
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};
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static struct platform_driver rt_timer_driver = {
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.probe = rt_timer_probe,
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.driver = {
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.name = "rt-timer",
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.of_match_table = rt_timer_match,
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.suppress_bind_attrs = true,
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},
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};
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builtin_platform_driver(rt_timer_driver);
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