e532c06f2a
arch/x86/power/cpu_32.c __save_processor_state calls read_cr4() only a i486 CPU doesn't have the CR4 register. Trying to read it produces an invalid opcode oops during suspend to disk. Use the safe rc4 reading op instead. If the value to be written is zero the write is skipped. arch/x86/power/hibernate_asm_32.S done: swapped the use of %eax and %ecx to use jecxz for the zero test and jump over store to %cr4. restore_image: s/%ecx/%eax/ to be consistent with done: In addition to __save_processor_state, acpi_save_state_mem, efi_call_phys_prelog, and efi_call_phys_epilog had checks added (acpi restore was in assembly and already had a check for non-zero). There were other reads and writes of CR4, but MCE and virtualization shouldn't be executed on a i486 anyway. Signed-off-by: David Fries <david@fries.net> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
81 lines
1.6 KiB
ArmAsm
81 lines
1.6 KiB
ArmAsm
.text
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/*
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* This may not use any stack, nor any variable that is not "NoSave":
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*
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* Its rewriting one kernel image with another. What is stack in "old"
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* image could very well be data page in "new" image, and overwriting
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* your own stack under you is bad idea.
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*/
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/page.h>
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#include <asm/asm-offsets.h>
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.text
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ENTRY(swsusp_arch_suspend)
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movl %esp, saved_context_esp
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movl %ebx, saved_context_ebx
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movl %ebp, saved_context_ebp
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movl %esi, saved_context_esi
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movl %edi, saved_context_edi
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pushfl ; popl saved_context_eflags
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call swsusp_save
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ret
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ENTRY(restore_image)
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movl resume_pg_dir, %eax
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subl $__PAGE_OFFSET, %eax
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movl %eax, %cr3
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movl restore_pblist, %edx
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.p2align 4,,7
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copy_loop:
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testl %edx, %edx
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jz done
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movl pbe_address(%edx), %esi
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movl pbe_orig_address(%edx), %edi
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movl $1024, %ecx
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rep
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movsl
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movl pbe_next(%edx), %edx
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jmp copy_loop
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.p2align 4,,7
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done:
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/* go back to the original page tables */
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movl $swapper_pg_dir, %eax
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subl $__PAGE_OFFSET, %eax
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movl %eax, %cr3
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/* Flush TLB, including "global" things (vmalloc) */
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movl mmu_cr4_features, %ecx
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jecxz 1f # cr4 Pentium and higher, skip if zero
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movl %ecx, %edx
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andl $~(1<<7), %edx; # PGE
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movl %edx, %cr4; # turn off PGE
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1:
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movl %cr3, %eax; # flush TLB
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movl %eax, %cr3
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jecxz 1f # cr4 Pentium and higher, skip if zero
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movl %ecx, %cr4; # turn PGE back on
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1:
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movl saved_context_esp, %esp
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movl saved_context_ebp, %ebp
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movl saved_context_ebx, %ebx
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movl saved_context_esi, %esi
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movl saved_context_edi, %edi
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pushl saved_context_eflags ; popfl
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xorl %eax, %eax
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ret
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