5a0e3ad6af
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
376 lines
10 KiB
C
376 lines
10 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
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*/
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#include <linux/slab.h>
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#include <asm/sn/types.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/io.h>
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#include <asm/sn/module.h>
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#include <asm/sn/intr.h>
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#include <asm/sn/pcibus_provider_defs.h>
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#include <asm/sn/pcidev.h>
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#include <asm/sn/sn_sal.h>
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#include "xtalk/hubdev.h"
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/*
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* The code in this file will only be executed when running with
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* a PROM that does _not_ have base ACPI IO support.
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* (i.e., SN_ACPI_BASE_SUPPORT() == 0)
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*/
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static int max_segment_number; /* Default highest segment number */
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static int max_pcibus_number = 255; /* Default highest pci bus number */
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/*
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* Retrieve the hub device info structure for the given nasid.
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*/
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static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
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{
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struct ia64_sal_retval ret_stuff;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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SAL_CALL_NOLOCK(ret_stuff,
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(u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
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(u64) handle, (u64) address, 0, 0, 0, 0, 0);
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return ret_stuff.v0;
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}
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/*
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* Retrieve the pci bus information given the bus number.
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*/
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static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
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{
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struct ia64_sal_retval ret_stuff;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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SAL_CALL_NOLOCK(ret_stuff,
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(u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
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(u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
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return ret_stuff.v0;
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}
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/*
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* Retrieve the pci device information given the bus and device|function number.
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*/
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static inline u64
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sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
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u64 sn_irq_info)
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{
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struct ia64_sal_retval ret_stuff;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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SAL_CALL_NOLOCK(ret_stuff,
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(u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
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(u64) segment, (u64) bus_number, (u64) devfn,
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(u64) pci_dev,
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sn_irq_info, 0, 0);
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return ret_stuff.v0;
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}
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/*
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* sn_fixup_ionodes() - This routine initializes the HUB data structure for
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* each node in the system. This function is only
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* executed when running with a non-ACPI capable PROM.
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*/
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static void __init sn_fixup_ionodes(void)
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{
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struct hubdev_info *hubdev;
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u64 status;
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u64 nasid;
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int i;
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extern void sn_common_hubdev_init(struct hubdev_info *);
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/*
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* Get SGI Specific HUB chipset information.
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* Inform Prom that this kernel can support domain bus numbering.
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*/
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for (i = 0; i < num_cnodes; i++) {
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hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
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nasid = cnodeid_to_nasid(i);
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hubdev->max_segment_number = 0xffffffff;
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hubdev->max_pcibus_number = 0xff;
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status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
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if (status)
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continue;
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/* Save the largest Domain and pcibus numbers found. */
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if (hubdev->max_segment_number) {
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/*
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* Dealing with a Prom that supports segments.
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*/
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max_segment_number = hubdev->max_segment_number;
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max_pcibus_number = hubdev->max_pcibus_number;
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}
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sn_common_hubdev_init(hubdev);
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}
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}
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/*
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* sn_pci_legacy_window_fixup - Create PCI controller windows for
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* legacy IO and MEM space. This needs to
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* be done here, as the PROM does not have
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* ACPI support defining the root buses
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* and their resources (_CRS),
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*/
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static void
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sn_legacy_pci_window_fixup(struct pci_controller *controller,
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u64 legacy_io, u64 legacy_mem)
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{
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controller->window = kcalloc(2, sizeof(struct pci_window),
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GFP_KERNEL);
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BUG_ON(controller->window == NULL);
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controller->window[0].offset = legacy_io;
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controller->window[0].resource.name = "legacy_io";
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controller->window[0].resource.flags = IORESOURCE_IO;
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controller->window[0].resource.start = legacy_io;
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controller->window[0].resource.end =
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controller->window[0].resource.start + 0xffff;
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controller->window[0].resource.parent = &ioport_resource;
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controller->window[1].offset = legacy_mem;
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controller->window[1].resource.name = "legacy_mem";
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controller->window[1].resource.flags = IORESOURCE_MEM;
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controller->window[1].resource.start = legacy_mem;
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controller->window[1].resource.end =
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controller->window[1].resource.start + (1024 * 1024) - 1;
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controller->window[1].resource.parent = &iomem_resource;
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controller->windows = 2;
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}
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/*
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* sn_pci_window_fixup() - Create a pci_window for each device resource.
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* It will setup pci_windows for use by
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* pcibios_bus_to_resource(), pcibios_resource_to_bus(),
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* etc.
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*/
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static void
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sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
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s64 * pci_addrs)
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{
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struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
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unsigned int i;
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unsigned int idx;
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unsigned int new_count;
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struct pci_window *new_window;
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if (count == 0)
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return;
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idx = controller->windows;
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new_count = controller->windows + count;
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new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL);
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BUG_ON(new_window == NULL);
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if (controller->window) {
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memcpy(new_window, controller->window,
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sizeof(struct pci_window) * controller->windows);
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kfree(controller->window);
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}
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/* Setup a pci_window for each device resource. */
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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if (pci_addrs[i] == -1)
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continue;
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new_window[idx].offset = dev->resource[i].start - pci_addrs[i];
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new_window[idx].resource = dev->resource[i];
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idx++;
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}
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controller->windows = new_count;
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controller->window = new_window;
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}
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/*
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* sn_io_slot_fixup() - We are not running with an ACPI capable PROM,
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* and need to convert the pci_dev->resource
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* 'start' and 'end' addresses to mapped addresses,
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* and setup the pci_controller->window array entries.
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*/
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void
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sn_io_slot_fixup(struct pci_dev *dev)
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{
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unsigned int count = 0;
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int idx;
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s64 pci_addrs[PCI_ROM_RESOURCE + 1];
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unsigned long addr, end, size, start;
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struct pcidev_info *pcidev_info;
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struct sn_irq_info *sn_irq_info;
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int status;
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pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
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if (!pcidev_info)
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panic("%s: Unable to alloc memory for pcidev_info", __func__);
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sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
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if (!sn_irq_info)
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panic("%s: Unable to alloc memory for sn_irq_info", __func__);
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/* Call to retrieve pci device information needed by kernel. */
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status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
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(u64) dev->bus->number,
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dev->devfn,
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(u64) __pa(pcidev_info),
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(u64) __pa(sn_irq_info));
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BUG_ON(status); /* Cannot get platform pci device information */
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/* Copy over PIO Mapped Addresses */
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for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
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if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
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pci_addrs[idx] = -1;
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continue;
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}
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start = dev->resource[idx].start;
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end = dev->resource[idx].end;
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size = end - start;
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if (size == 0) {
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pci_addrs[idx] = -1;
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continue;
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}
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pci_addrs[idx] = start;
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count++;
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addr = pcidev_info->pdi_pio_mapped_addr[idx];
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addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
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dev->resource[idx].start = addr;
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dev->resource[idx].end = addr + size;
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/*
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* if it's already in the device structure, remove it before
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* inserting
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*/
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if (dev->resource[idx].parent && dev->resource[idx].parent->child)
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release_resource(&dev->resource[idx]);
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if (dev->resource[idx].flags & IORESOURCE_IO)
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insert_resource(&ioport_resource, &dev->resource[idx]);
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else
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insert_resource(&iomem_resource, &dev->resource[idx]);
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/*
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* If ROM, set the actual ROM image size, and mark as
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* shadowed in PROM.
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*/
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if (idx == PCI_ROM_RESOURCE) {
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size_t image_size;
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void __iomem *rom;
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rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
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size + 1);
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image_size = pci_get_rom_size(dev, rom, size + 1);
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dev->resource[PCI_ROM_RESOURCE].end =
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dev->resource[PCI_ROM_RESOURCE].start +
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image_size - 1;
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dev->resource[PCI_ROM_RESOURCE].flags |=
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IORESOURCE_ROM_BIOS_COPY;
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}
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}
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/* Create a pci_window in the pci_controller struct for
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* each device resource.
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*/
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if (count > 0)
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sn_pci_window_fixup(dev, count, pci_addrs);
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sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
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}
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EXPORT_SYMBOL(sn_io_slot_fixup);
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/*
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* sn_pci_controller_fixup() - This routine sets up a bus's resources
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* consistent with the Linux PCI abstraction layer.
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*/
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static void __init
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sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
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{
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s64 status = 0;
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struct pci_controller *controller;
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struct pcibus_bussoft *prom_bussoft_ptr;
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status = sal_get_pcibus_info((u64) segment, (u64) busnum,
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(u64) ia64_tpa(&prom_bussoft_ptr));
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if (status > 0)
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return; /*bus # does not exist */
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prom_bussoft_ptr = __va(prom_bussoft_ptr);
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controller = kzalloc(sizeof(*controller), GFP_KERNEL);
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BUG_ON(!controller);
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controller->segment = segment;
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/*
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* Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
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* (platform_data will be overwritten later in sn_common_bus_fixup())
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*/
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controller->platform_data = prom_bussoft_ptr;
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bus = pci_scan_bus(busnum, &pci_root_ops, controller);
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if (bus == NULL)
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goto error_return; /* error, or bus already scanned */
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bus->sysdata = controller;
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return;
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error_return:
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kfree(controller);
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return;
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}
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/*
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* sn_bus_fixup
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*/
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void
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sn_bus_fixup(struct pci_bus *bus)
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{
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struct pci_dev *pci_dev = NULL;
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struct pcibus_bussoft *prom_bussoft_ptr;
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if (!bus->parent) { /* If root bus */
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prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
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if (prom_bussoft_ptr == NULL) {
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printk(KERN_ERR
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"sn_bus_fixup: 0x%04x:0x%02x Unable to "
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"obtain prom_bussoft_ptr\n",
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pci_domain_nr(bus), bus->number);
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return;
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}
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sn_common_bus_fixup(bus, prom_bussoft_ptr);
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sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
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prom_bussoft_ptr->bs_legacy_io,
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prom_bussoft_ptr->bs_legacy_mem);
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}
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list_for_each_entry(pci_dev, &bus->devices, bus_list) {
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sn_io_slot_fixup(pci_dev);
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}
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}
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/*
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* sn_io_init - PROM does not have ACPI support to define nodes or root buses,
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* so we need to do things the hard way, including initiating the
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* bus scanning ourselves.
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*/
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void __init sn_io_init(void)
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{
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int i, j;
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sn_fixup_ionodes();
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/* busses are not known yet ... */
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for (i = 0; i <= max_segment_number; i++)
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for (j = 0; j <= max_pcibus_number; j++)
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sn_pci_controller_fixup(i, j, NULL);
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}
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