368dd5acd1
Implement the Panasonic MN10300 AM34 CPU subarch and implement SMP support for MN10300. Also implement support for the MN2WS0060 processor and the ASB2364 evaluation board which are AM34 based. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
105 lines
2.7 KiB
C
105 lines
2.7 KiB
C
/* MN10300 Exception frame layout and ptrace constants
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_PTRACE_H
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#define _ASM_PTRACE_H
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#define PT_A3 0
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#define PT_A2 1
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#define PT_D3 2
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#define PT_D2 3
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#define PT_MCVF 4
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#define PT_MCRL 5
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#define PT_MCRH 6
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#define PT_MDRQ 7
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#define PT_E1 8
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#define PT_E0 9
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#define PT_E7 10
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#define PT_E6 11
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#define PT_E5 12
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#define PT_E4 13
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#define PT_E3 14
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#define PT_E2 15
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#define PT_SP 16
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#define PT_LAR 17
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#define PT_LIR 18
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#define PT_MDR 19
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#define PT_A1 20
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#define PT_A0 21
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#define PT_D1 22
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#define PT_D0 23
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#define PT_ORIG_D0 24
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#define PT_EPSW 25
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#define PT_PC 26
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#define NR_PTREGS 27
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/*
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* This defines the way registers are stored in the event of an exception
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* - the strange order is due to the MOVM instruction
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*/
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struct pt_regs {
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unsigned long a3; /* syscall arg 3 */
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unsigned long a2; /* syscall arg 4 */
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unsigned long d3; /* syscall arg 5 */
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unsigned long d2; /* syscall arg 6 */
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unsigned long mcvf;
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unsigned long mcrl;
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unsigned long mcrh;
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unsigned long mdrq;
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unsigned long e1;
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unsigned long e0;
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unsigned long e7;
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unsigned long e6;
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unsigned long e5;
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unsigned long e4;
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unsigned long e3;
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unsigned long e2;
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unsigned long sp;
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unsigned long lar;
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unsigned long lir;
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unsigned long mdr;
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unsigned long a1;
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unsigned long a0; /* syscall arg 1 */
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unsigned long d1; /* syscall arg 2 */
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unsigned long d0; /* syscall ret */
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struct pt_regs *next; /* next frame pointer */
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unsigned long orig_d0; /* syscall number */
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unsigned long epsw;
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unsigned long pc;
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};
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/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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#define PTRACE_GETFPREGS 14
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#define PTRACE_SETFPREGS 15
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/* options set using PTRACE_SETOPTIONS */
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#define PTRACE_O_TRACESYSGOOD 0x00000001
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#ifdef __KERNEL__
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#ifdef CONFIG_SMP
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extern struct pt_regs *___frame[]; /* current frame pointer */
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#else
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extern struct pt_regs *__frame; /* current frame pointer */
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#endif
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#define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
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#define instruction_pointer(regs) ((regs)->pc)
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#define user_stack_pointer(regs) ((regs)->sp)
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extern void show_regs(struct pt_regs *);
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#define arch_has_single_step() (1)
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#define profile_pc(regs) ((regs)->pc)
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#endif /* __KERNEL__ */
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#endif /* _ASM_PTRACE_H */
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