34800598b2
These are all specific to some driver. They are typically the platform side of a change in the drivers directory, such as adding a new driver or extending the interface to the platform. In cases where there is no maintainer for the driver, or the maintainer prefers to have the platform changes in the same branch as the driver changes, the patches to the drivers are included as well. A much smaller set of driver updates that depend on other branches getting merged first will be sent later. The new export of tegra_chip_uid conflicts with other changes in fuse.c. In rtc-sa1100.c, the global removal of IRQF_DISABLED conflicts with the cleanup of the interrupt handling of that driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUAT24/Y2CrR//JCVInAQLUdw//V4pKPuKempSe1kuD2MJfqldHwEVOlAUt of1IhLPAp8tpCscPDQ0yTy3ixquINg4jVnaDLL+E0quVbhLu6hlS2TYNKDEaVAAc cPUtVEUdja7Cfu4+bXX2vcWM/UyI6Ax7bsUUcwu4wFnEsjA6qOSu/jYY4jXDguHq ODGQSaSz0XQkfVBsWOlO8W/ejb0T3y+Ro3M/Vz5qJsMnZBR8R/i9aUYDFGiZ1GTn 3APHB7ALz6SS5/9SJS65PH16poBexcea5gyb3gnR1yt30kRmMTOAWrLC+JdyqFaO 7LHXW514+D1QbWV2gwNCWhQSLbgp9PWq/FXJtq4StW7tgNbDbj1d1Dc1GX+fvk2M bBih1yWoIVx6CZWFBQ7gsbqVHUZ/sW2fo76yb8K5dVPXx0fL5lEkv5Xwk3gxbqt5 lPE8+z+jiL5D+8RK1DZQu1PfxzaMwDZkJkVoGLCcdyM7FvnX3LIYf2bqbcp+zrQL lz9aht9C1k12R7feOX8emlluNd3eaKv/6jLrOasUP5wrJDam5hesSD5mLeTlAdxZ U8XJe4L24dFv15/yrMCzcyes5EmB3aS3nfb9TsSfq22IOKo2PCQLCnL6Z/rfM+1p mGu7BqdBnx3/8NkHdUrttMWjuPNh77MfPM6RO/E+TaBLHtwvKoLWJAHAYQNmt2xH IbGcyorBD5s= =pQ3X -----END PGP SIGNATURE----- Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull "ARM: driver specific updates" from Arnd Bergmann: "These are all specific to some driver. They are typically the platform side of a change in the drivers directory, such as adding a new driver or extending the interface to the platform. In cases where there is no maintainer for the driver, or the maintainer prefers to have the platform changes in the same branch as the driver changes, the patches to the drivers are included as well. A much smaller set of driver updates that depend on other branches getting merged first will be sent later. The new export of tegra_chip_uid conflicts with other changes in fuse.c. In rtc-sa1100.c, the global removal of IRQF_DISABLED conflicts with the cleanup of the interrupt handling of that driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fixed up aforementioned trivial conflicts. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits) ARM: SAMSUNG: change the name from s3c-sdhci to exynos4-sdhci mmc: sdhci-s3c: add platform data for the second capability ARM: SAMSUNG: support the second capability for samsung-soc ARM: EXYNOS: add support DMA for EXYNOS4X12 SoC ARM: EXYNOS: Add apb_pclk clkdev entry for mdma1 ARM: EXYNOS: Enable MDMA driver regulator: Remove bq24022 regulator driver rtc: sa1100: add OF support pxa: magician/hx4700: Convert to gpio-regulator from bq24022 ARM: OMAP3+: SmartReflex: fix error handling ARM: OMAP3+: SmartReflex: fix the use of debugfs_create_* API ARM: OMAP3+: SmartReflex: micro-optimization for sanity check ARM: OMAP3+: SmartReflex: misc cleanups ARM: OMAP3+: SmartReflex: move late_initcall() closer to its argument ARM: OMAP3+: SmartReflex: add missing platform_set_drvdata() ARM: OMAP3+: hwmod: add SmartReflex IRQs ARM: OMAP3+: SmartReflex: clear ERRCONFIG_VPBOUNDINTST only on a need ARM: OMAP3+: SmartReflex: Fix status masking in ERRCONFIG register ARM: OMAP3+: SmartReflex: Add a shutdown hook ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP ... Conflicts: arch/arm/mach-tegra/Makefile arch/arm/mach-tegra/fuse.c drivers/rtc/rtc-sa1100.c
605 lines
16 KiB
C
605 lines
16 KiB
C
/*
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* Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/moduleparam.h>
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#include <linux/leds.h>
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#include <linux/memory.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/partitions.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/machine.h>
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#include <linux/mfd/mc13783.h>
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#include <linux/spi/spi.h>
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#include <linux/types.h>
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#include <linux/memblock.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/input.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/ulpi.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include <asm/memblock.h>
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#include <mach/board-mx31moboard.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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#include <mach/iomux-mx3.h>
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#include <mach/ulpi.h>
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#include "devices-imx31.h"
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static unsigned int moboard_pins[] = {
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/* UART0 */
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MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1,
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MX31_PIN_CTS1__GPIO2_7,
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/* UART4 */
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MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5,
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MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5,
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/* I2C0 */
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MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL,
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/* I2C1 */
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MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL,
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/* SDHC1 */
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MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2,
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MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0,
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MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD,
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MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27,
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/* USB reset */
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MX31_PIN_GPIO1_0__GPIO1_0,
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/* USB OTG */
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MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
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MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
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MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
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MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
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MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
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MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
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MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
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MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
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MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
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MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
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MX31_PIN_USB_OC__GPIO1_30,
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/* USB H2 */
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MX31_PIN_USBH2_DATA0__USBH2_DATA0,
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MX31_PIN_USBH2_DATA1__USBH2_DATA1,
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MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3,
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MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5,
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MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7,
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MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR,
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MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP,
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MX31_PIN_SCK6__GPIO1_25,
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/* LEDs */
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MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
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MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
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/* SPI1 */
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MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO,
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MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
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MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2,
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/* Atlas IRQ */
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MX31_PIN_GPIO1_3__GPIO1_3,
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/* SPI2 */
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MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO,
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MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY,
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MX31_PIN_CSPI2_SS1__CSPI3_SS1,
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};
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static struct physmap_flash_data mx31moboard_flash_data = {
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.width = 2,
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};
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static struct resource mx31moboard_flash_resource = {
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.start = 0xa0000000,
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.end = 0xa1ffffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device mx31moboard_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &mx31moboard_flash_data,
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},
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.resource = &mx31moboard_flash_resource,
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.num_resources = 1,
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};
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static int moboard_uart0_init(struct platform_device *pdev)
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{
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int ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack");
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if (ret)
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return ret;
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ret = gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0);
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if (ret)
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gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1));
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return ret;
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}
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static void moboard_uart0_exit(struct platform_device *pdev)
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{
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gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1));
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}
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static const struct imxuart_platform_data uart0_pdata __initconst = {
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.init = moboard_uart0_init,
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.exit = moboard_uart0_exit,
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};
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static const struct imxuart_platform_data uart4_pdata __initconst = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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static const struct imxi2c_platform_data moboard_i2c0_data __initconst = {
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.bitrate = 400000,
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};
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static const struct imxi2c_platform_data moboard_i2c1_data __initconst = {
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.bitrate = 100000,
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};
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static int moboard_spi1_cs[] = {
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MXC_SPI_CS(0),
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MXC_SPI_CS(2),
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};
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static const struct spi_imx_master moboard_spi1_pdata __initconst = {
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.chipselect = moboard_spi1_cs,
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.num_chipselect = ARRAY_SIZE(moboard_spi1_cs),
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};
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static struct regulator_consumer_supply sdhc_consumers[] = {
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{
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.dev_name = "mxc-mmc.0",
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.supply = "sdhc0_vcc",
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},
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{
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.dev_name = "mxc-mmc.1",
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.supply = "sdhc1_vcc",
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},
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};
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static struct regulator_init_data sdhc_vreg_data = {
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.constraints = {
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.min_uV = 2700000,
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.max_uV = 3000000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
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.valid_modes_mask = REGULATOR_MODE_NORMAL |
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REGULATOR_MODE_FAST,
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.always_on = 0,
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.boot_on = 1,
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},
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.num_consumer_supplies = ARRAY_SIZE(sdhc_consumers),
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.consumer_supplies = sdhc_consumers,
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};
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static struct regulator_consumer_supply cam_consumers[] = {
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{
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.dev_name = "mx3_camera.0",
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.supply = "cam_vcc",
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},
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};
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static struct regulator_init_data cam_vreg_data = {
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.constraints = {
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.min_uV = 2700000,
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.max_uV = 3000000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
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.valid_modes_mask = REGULATOR_MODE_NORMAL |
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REGULATOR_MODE_FAST,
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.always_on = 0,
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.boot_on = 1,
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},
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.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
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.consumer_supplies = cam_consumers,
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};
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static struct mc13xxx_regulator_init_data moboard_regulators[] = {
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{
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.id = MC13783_REG_VMMC1,
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.init_data = &sdhc_vreg_data,
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},
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{
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.id = MC13783_REG_VCAM,
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.init_data = &cam_vreg_data,
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},
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};
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static struct mc13xxx_led_platform_data moboard_led[] = {
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{
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.id = MC13783_LED_R1,
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.name = "coreboard-led-4:red",
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.max_current = 2,
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},
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{
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.id = MC13783_LED_G1,
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.name = "coreboard-led-4:green",
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.max_current = 2,
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},
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{
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.id = MC13783_LED_B1,
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.name = "coreboard-led-4:blue",
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.max_current = 2,
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},
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{
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.id = MC13783_LED_R2,
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.name = "coreboard-led-5:red",
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.max_current = 3,
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},
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{
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.id = MC13783_LED_G2,
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.name = "coreboard-led-5:green",
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.max_current = 3,
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},
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{
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.id = MC13783_LED_B2,
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.name = "coreboard-led-5:blue",
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.max_current = 3,
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},
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};
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static struct mc13xxx_leds_platform_data moboard_leds = {
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.num_leds = ARRAY_SIZE(moboard_led),
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.led = moboard_led,
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.flags = MC13783_LED_SLEWLIMTC,
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.abmode = MC13783_LED_AB_DISABLED,
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.tc1_period = MC13783_LED_PERIOD_10MS,
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.tc2_period = MC13783_LED_PERIOD_10MS,
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};
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static struct mc13xxx_buttons_platform_data moboard_buttons = {
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.b1on_flags = MC13783_BUTTON_DBNC_750MS | MC13783_BUTTON_ENABLE |
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MC13783_BUTTON_POL_INVERT,
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.b1on_key = KEY_POWER,
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};
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static struct mc13xxx_platform_data moboard_pmic = {
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.regulators = {
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.regulators = moboard_regulators,
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.num_regulators = ARRAY_SIZE(moboard_regulators),
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},
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.leds = &moboard_leds,
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.buttons = &moboard_buttons,
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.flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC,
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};
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static struct spi_board_info moboard_spi_board_info[] __initdata = {
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{
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.modalias = "mc13783",
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.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
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.max_speed_hz = 300000,
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.bus_num = 1,
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.chip_select = 0,
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.platform_data = &moboard_pmic,
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.mode = SPI_CS_HIGH,
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},
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};
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static int moboard_spi2_cs[] = {
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MXC_SPI_CS(1),
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};
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static const struct spi_imx_master moboard_spi2_pdata __initconst = {
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.chipselect = moboard_spi2_cs,
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.num_chipselect = ARRAY_SIZE(moboard_spi2_cs),
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};
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#define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0)
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#define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1)
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static int moboard_sdhc1_get_ro(struct device *dev)
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{
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return !gpio_get_value(SDHC1_WP);
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}
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static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
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void *data)
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{
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int ret;
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ret = gpio_request(SDHC1_CD, "sdhc-detect");
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if (ret)
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return ret;
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gpio_direction_input(SDHC1_CD);
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ret = gpio_request(SDHC1_WP, "sdhc-wp");
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if (ret)
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goto err_gpio_free;
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gpio_direction_input(SDHC1_WP);
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ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq,
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IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
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"sdhc1-card-detect", data);
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if (ret)
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goto err_gpio_free_2;
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return 0;
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err_gpio_free_2:
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gpio_free(SDHC1_WP);
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err_gpio_free:
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gpio_free(SDHC1_CD);
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return ret;
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}
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static void moboard_sdhc1_exit(struct device *dev, void *data)
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{
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free_irq(gpio_to_irq(SDHC1_CD), data);
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gpio_free(SDHC1_WP);
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gpio_free(SDHC1_CD);
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}
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static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
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.get_ro = moboard_sdhc1_get_ro,
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.init = moboard_sdhc1_init,
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.exit = moboard_sdhc1_exit,
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};
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/*
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* this pin is dedicated for all mx31moboard systems, so we do it here
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*/
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#define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)
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#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
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PAD_CTL_ODE_CMOS)
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#define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC)
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#define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6)
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static void usb_xcvr_reset(void)
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{
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG | PAD_CTL_100K_PU);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG | PAD_CTL_100K_PU);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG | PAD_CTL_100K_PU);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG | PAD_CTL_100K_PU);
|
|
|
|
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG | PAD_CTL_100K_PU);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG | PAD_CTL_100K_PU);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG | PAD_CTL_100K_PU);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG | PAD_CTL_100K_PU);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG | PAD_CTL_100K_PD);
|
|
|
|
gpio_request(OTG_EN_B, "usb-udc-en");
|
|
gpio_direction_output(OTG_EN_B, 0);
|
|
gpio_request(USBH2_EN_B, "usbh2-en");
|
|
gpio_direction_output(USBH2_EN_B, 0);
|
|
|
|
gpio_request(USB_RESET_B, "usb-reset");
|
|
gpio_direction_output(USB_RESET_B, 0);
|
|
mdelay(1);
|
|
gpio_set_value(USB_RESET_B, 1);
|
|
mdelay(1);
|
|
}
|
|
|
|
static int moboard_usbh2_init_hw(struct platform_device *pdev)
|
|
{
|
|
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
|
|
}
|
|
|
|
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
|
|
.init = moboard_usbh2_init_hw,
|
|
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
|
|
};
|
|
|
|
static int __init moboard_usbh2_init(void)
|
|
{
|
|
struct platform_device *pdev;
|
|
|
|
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
|
ULPI_OTG_DRVVBUS_EXT);
|
|
if (!usbh2_pdata.otg)
|
|
return -ENODEV;
|
|
|
|
pdev = imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
|
|
if (IS_ERR(pdev))
|
|
return PTR_ERR(pdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct gpio_led mx31moboard_leds[] __initconst = {
|
|
{
|
|
.name = "coreboard-led-0:red:running",
|
|
.default_trigger = "heartbeat",
|
|
.gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0),
|
|
}, {
|
|
.name = "coreboard-led-1:red",
|
|
.gpio = IOMUX_TO_GPIO(MX31_PIN_STX0),
|
|
}, {
|
|
.name = "coreboard-led-2:red",
|
|
.gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0),
|
|
}, {
|
|
.name = "coreboard-led-3:red",
|
|
.gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0),
|
|
},
|
|
};
|
|
|
|
static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = {
|
|
.num_leds = ARRAY_SIZE(mx31moboard_leds),
|
|
.leds = mx31moboard_leds,
|
|
};
|
|
|
|
static const struct ipu_platform_data mx3_ipu_data __initconst = {
|
|
.irq_base = MXC_IPU_IRQ_START,
|
|
};
|
|
|
|
static struct platform_device *devices[] __initdata = {
|
|
&mx31moboard_flash,
|
|
};
|
|
|
|
static struct mx3_camera_pdata camera_pdata __initdata = {
|
|
.flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
|
|
.mclk_10khz = 4800,
|
|
};
|
|
|
|
static phys_addr_t mx3_camera_base __initdata;
|
|
#define MX3_CAMERA_BUF_SIZE SZ_4M
|
|
|
|
static int __init mx31moboard_init_cam(void)
|
|
{
|
|
int dma, ret = -ENOMEM;
|
|
struct platform_device *pdev;
|
|
|
|
imx31_add_ipu_core(&mx3_ipu_data);
|
|
|
|
pdev = imx31_alloc_mx3_camera(&camera_pdata);
|
|
if (IS_ERR(pdev))
|
|
return PTR_ERR(pdev);
|
|
|
|
dma = dma_declare_coherent_memory(&pdev->dev,
|
|
mx3_camera_base, mx3_camera_base,
|
|
MX3_CAMERA_BUF_SIZE,
|
|
DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
|
|
if (!(dma & DMA_MEMORY_MAP))
|
|
goto err;
|
|
|
|
ret = platform_device_add(pdev);
|
|
if (ret)
|
|
err:
|
|
platform_device_put(pdev);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
static void mx31moboard_poweroff(void)
|
|
{
|
|
struct clk *clk = clk_get_sys("imx2-wdt.0", NULL);
|
|
|
|
if (!IS_ERR(clk))
|
|
clk_prepare_enable(clk);
|
|
|
|
mxc_iomux_mode(MX31_PIN_WATCHDOG_RST__WATCHDOG_RST);
|
|
|
|
__raw_writew(1 << 6 | 1 << 2, MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
|
|
}
|
|
|
|
static int mx31moboard_baseboard;
|
|
core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444);
|
|
|
|
/*
|
|
* Board specific initialization.
|
|
*/
|
|
static void __init mx31moboard_init(void)
|
|
{
|
|
imx31_soc_init();
|
|
|
|
mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins),
|
|
"moboard");
|
|
|
|
platform_add_devices(devices, ARRAY_SIZE(devices));
|
|
gpio_led_register_device(-1, &mx31moboard_led_pdata);
|
|
|
|
imx31_add_imx2_wdt(NULL);
|
|
|
|
imx31_add_imx_uart0(&uart0_pdata);
|
|
imx31_add_imx_uart4(&uart4_pdata);
|
|
|
|
imx31_add_imx_i2c0(&moboard_i2c0_data);
|
|
imx31_add_imx_i2c1(&moboard_i2c1_data);
|
|
|
|
imx31_add_spi_imx1(&moboard_spi1_pdata);
|
|
imx31_add_spi_imx2(&moboard_spi2_pdata);
|
|
|
|
gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq");
|
|
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
|
|
spi_register_board_info(moboard_spi_board_info,
|
|
ARRAY_SIZE(moboard_spi_board_info));
|
|
|
|
imx31_add_mxc_mmc(0, &sdhc1_pdata);
|
|
|
|
mx31moboard_init_cam();
|
|
|
|
usb_xcvr_reset();
|
|
|
|
moboard_usbh2_init();
|
|
|
|
pm_power_off = mx31moboard_poweroff;
|
|
|
|
switch (mx31moboard_baseboard) {
|
|
case MX31NOBOARD:
|
|
break;
|
|
case MX31DEVBOARD:
|
|
mx31moboard_devboard_init();
|
|
break;
|
|
case MX31MARXBOT:
|
|
mx31moboard_marxbot_init();
|
|
break;
|
|
case MX31SMARTBOT:
|
|
case MX31EYEBOT:
|
|
mx31moboard_smartbot_init(mx31moboard_baseboard);
|
|
break;
|
|
default:
|
|
printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n",
|
|
mx31moboard_baseboard);
|
|
}
|
|
}
|
|
|
|
static void __init mx31moboard_timer_init(void)
|
|
{
|
|
mx31_clocks_init(26000000);
|
|
}
|
|
|
|
struct sys_timer mx31moboard_timer = {
|
|
.init = mx31moboard_timer_init,
|
|
};
|
|
|
|
static void __init mx31moboard_reserve(void)
|
|
{
|
|
/* reserve 4 MiB for mx3-camera */
|
|
mx3_camera_base = arm_memblock_steal(MX3_CAMERA_BUF_SIZE,
|
|
MX3_CAMERA_BUF_SIZE);
|
|
}
|
|
|
|
MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
|
|
/* Maintainer: Philippe Retornaz, EPFL Mobots group */
|
|
.atag_offset = 0x100,
|
|
.reserve = mx31moboard_reserve,
|
|
.map_io = mx31_map_io,
|
|
.init_early = imx31_init_early,
|
|
.init_irq = mx31_init_irq,
|
|
.handle_irq = imx31_handle_irq,
|
|
.timer = &mx31moboard_timer,
|
|
.init_machine = mx31moboard_init,
|
|
.restart = mxc_restart,
|
|
MACHINE_END
|